TDA5250 Infineon Technologies, TDA5250 Datasheet - Page 90

TX/RX ASK/FSK 868-870MHZ 38TSSOP

TDA5250

Manufacturer Part Number
TDA5250
Description
TX/RX ASK/FSK 868-870MHZ 38TSSOP
Manufacturer
Infineon Technologies
Type
Transceiverr
Datasheets

Specifications of TDA5250

Package / Case
38-TSSOP
Frequency
868MHz
Data Rate - Maximum
64kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, Remote Control Systems
Power - Output
9dBm
Sensitivity
-109dBm
Voltage - Supply
2.1 V ~ 5.5 V
Current - Receiving
9mA
Current - Transmitting
12mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Operating Frequency
870 MHz
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
SP000012956
TDA5250
TDA5250INTR
TDA5250XT
TDA5250XT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA5250
Manufacturer:
Infineon Technologies
Quantity:
135
Part Number:
TDA5250
Quantity:
198
Part Number:
TDA5250D2
Manufacturer:
INFINEON
Quantity:
300
Part Number:
TDA5250D2
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
List of Tables
Table 2-1
Table 2-2
Table 2-3
Table 2-4
Table 2-5
Table 2-6
Table 2-7
Table 2-8
Table 2-9
Table 2-10
Table 2-11
Table 2-12
Table 2-13
Table 2-14
Table 2-15
Table 2-16
Table 2-17
Table 2-18
Table 2-19
Table 2-20
Table 2-21
Table 2-22
Table 2-23
Table 2-24
Table 2-25
Table 2-26
Table 2-27
Table 2-28
Table 2-29
Table 2-30
Table 2-31
Table 2-32
Table 2-33
Table 2-34
Table 3-1
Table 3-2
Table 3-3
Table 3-4
Table 3-5
Table 3-6
Table 3-7
Table 3-8
Table 3-9
Data Sheet
Pin Definition and Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 00H: CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 00H: CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 00H: CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PwdDD Pin Operating States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bus Interface Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chip address Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-wire Bus Write Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-wire Bus Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 01H: FSK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 02H: XTAL_TUNING . . . . . . . . . . . . . . . . . . . . . . . . . .
Crystal and crystal oscilator dependency . . . . . . . . . . . . . . . . . . . . .
Typical values of parasitic capacitances . . . . . . . . . . . . . . . . . . . . . .
Sub Address 0EH: XTAL_CONFIG. . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 02H: XTAL_TUNING . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 01H: FSK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Default oscillator settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Default Setup (without internal tuning & without Pin21 usage) . . . . .
3dB cutoff frequencies I/Q Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C Bus Write Mode 8 Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C Bus Write Mode 16 Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C Bus Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Addresses of Data Registers Write. . . . . . . . . . . . . . . . . . . . . .
Sub Addresses of Data Registers Read. . . . . . . . . . . . . . . . . . . . . .
Sub Address 00H: CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Addresses of Data Registers Write. . . . . . . . . . . . . . . . . . . . . .
Sub Addresses of Data Registers Read. . . . . . . . . . . . . . . . . . . . . .
Sub Address 00H: CONFIG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 03H: LPF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Addresses 04H / 05H: ON/OFF_TIME . . . . . . . . . . . . . . . . . . .
Sub Address 06H: COUNT_TH1 . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 07H: COUNT_TH2 . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 08H: RSSI_TH3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 0DH: CLK_DIV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 0EH: XTAL_CONFIG . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 0FH: BLOCK_PD . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 80H: STATUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sub Address 81H: ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MODE settings: CONFIG register . . . . . . . . . . . . . . . . . . . . . . . . . .
CLK_DIV Output Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CLK_DIV Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Source for 6Bit-ADC Selection (Register 08H). . . . . . . . . . . . . . . . .
90
TDA5250 D2
Version 1.7
2007-02-26
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