EM260-RTY Ember, EM260-RTY Datasheet - Page 16

IC ZIGBEE SYSTEM-ON-CHIP 40-QFN

EM260-RTY

Manufacturer Part Number
EM260-RTY
Description
IC ZIGBEE SYSTEM-ON-CHIP 40-QFN
Manufacturer
Ember

Specifications of EM260-RTY

Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4
Applications
ZigBee™
Power - Output
-32dBm ~ 3dBm
Sensitivity
-97dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
30mA
Current - Transmitting
34mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
40-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Other names
636-1003
EM260
4.3
4.4
4.5
16
Integrated MAC Module
Packet Trace Interface (PTI)
XAP2b Microprocessor
120-1003-000D
4.2.1
The EM260 TX baseband (within the digital domain) performs the spreading of the 4-bit symbol into its IEEE
802.15.4-2003-defined, 32-chip I and Q sequence. In addition, it provides the interface for software to per-
form the calibration of the TX module in order to reduce process, temperature, and voltage variations.
The EM260 integrates critical portions of the IEEE 802.15.4-2003 MAC requirements in hardware. This allows
the EM260 to provide greater bandwidth to application and network operations. In addition, the hardware acts
as a first-line filter for non-intended packets. The EM260 MAC utilizes a DMA interface to RAM memory to
further reduce the overall microcontroller interaction when transmitting or receiving packets.
When a packet is ready for transmission, the software configures the TX MAC DMA by indicating the packet
buffer RAM location. The MAC waits for the backoff period, then transitions the baseband to TX mode and
performs channel assessment. When the channel is clear, the MAC reads data from the RAM buffer, calculates
the CRC, and provides 4-bit symbols to the baseband. When the final byte has been read and sent to the
baseband, the CRC remainder is read and transmitted.
The MAC resides in RX mode most of the time, and different format and address filters keep non-intended
packets from using excessive RAM buffers, as well as preventing the EM260 CPU from being interrupted. When
the reception of a packet begins, the MAC reads 4-bit symbols from the baseband and calculates the CRC. It
assembles the received data for storage in a RAM buffer. A RX MAC DMA provides direct access to the RAM
memory. Once the packet has been received, additional data is appended to the end of the packet in the RAM
buffer space. The appended data provides statistical information on the packet for the software stack.
The primary features of the MAC are:
The EM260 integrates a true PHY-level PTI for effective network-level debugging. This two-signal interface
monitors all the PHY TX and RX packets (in a non-intrusive manner) between the MAC and baseband modules.
It is an asynchronous 500kbps interface and cannot be used to inject packets into the PHY/MAC interface. The
two signals from the EM260 are the frame signal (PTI_EN) and the data signal (PTI_DATA). The PTI is supported
by InSight Desktop.
The EM260 integrates the XAP2b microprocessor developed by Cambridge Consultants Ltd., making it a true
network processor solution. The XAP2b is a 16-bit Harvard architecture processor with separate program and
data address spaces. The word width is 16 bits for both the program and data sides.
CRC generation, appending, and checking
Hardware timers and interrupts to achieve the MAC symbol timing
Automatic preamble, and SFD pre-pended to a TX packet
Address recognition and packet filtering on received packets
Automatic acknowledgement transmission
Automatic transmission of packets from memory
Automatic transmission after backoff time if channel is clear (CCA)
Automatic acknowledgement checking
Time stamping of received and transmitted messages
Attaching packet information to received packets (LQI, RSSI, gain, time stamp, and packet status)
IEEE 802.15.4-2003 timing and slotted/unslotted timing
TX Baseband

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