EM260-RTY Ember, EM260-RTY Datasheet - Page 21

• Manufacturer Part Number: EM260-RTY
• Description: IC ZIGBEE SYSTEM-ON-CHIP 40-QFN
• Manufacturer: Ember

Specifications of EM260-RTY

• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ZigBee™
• Power - Output: -32dBm ~ 3dBm
• Sensitivity: -97dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 30mA
• Current - Transmitting: 34mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Other names: 636-1003

4.13 Sleep Timer
4.14 Power Management
The 16-bit sleep timer is contained in the always-powered digital block. The clock source for the sleep timer
is a calibrated 1kHz clock. The frequency is slowed down with a 2
tion of 1ms. With a 1ms tick and a 16-bit timer, the timer wraps about every 65.5 seconds. The EmberZNet
stack appropriately handles timer wraps allowing the Host to order a theoretical maximum sleep delay of 4
million seconds.
The EM260 supports three different power modes: processor ACTIVE, processor IDLE, and DEEP SLEEP.
The IDLE power mode stops code execution of the XAP2b until any interrupt occurs or an external SIF wakeup
command is seen. All peripherals of the EM260 including the radio continue to operate normally. The Em-
berZNet stack automatically invokes IDLE mode as appropriate.
The DEEP SLEEP power mode powers off most of the EM260 but leaves the critical chip functions, such as the
GPIO pads and RAM powered by the High Voltage Supply (VDD_PADS). The EM260 can be woken by configuring
the sleep timer to generate an interrupt after a period of time, using an external interrupt, or with the SIF
interface. Activity on a serial interface may also be configured to wake the EM260, though actual reception of
data is not re-enabled until the EM260 has finished waking up. Depending on the speed of the serial data, it is
possible to finish waking up in the middle of a byte. Care must be taken to reset the serial interface between
bytes and discard any garbage data before the rest.
When in DEEP SLEEP, the internal regulator is disabled and VREG_OUT is turned off. All GPIO output signals
are maintained in a frozen state. The operation of DEEP SLEEP is controlled by EmberZNet APIs which auto-
matically preserve the state of necessary system peripherals. The internal XAP2b CPU registers are automati-
cally saved and restored to RAM by hardware when entering and leaving the DEEP SLEEP mode, allowing code
execution to continue from where it left off. The event that caused the wakeup and any additional events
that occurred while waking up are reported to the application via the EmberZNet APIs. Upon waking from
DEEP SLEEP, the internal regulator is re-enabled.
4.14.1 Integrated Voltage Regulator
The EM260 integrates a low dropout regulator to provide an accurate core voltage at a low quiescent current.
Table 14 lists the specifications for the integrated voltage regulator. With the regulator enabled, the pads
supply voltage VDD_PADS is stepped down to the 1.8V regulator output VREG_OUT. The VREG_OUT signal must
be externally decoupled and routed to the 1.8V core supply pins VDD_24MHZ, VDD_VCO, VDD_RF, VDD_IF,
VDD_SYNTH_PRE, VDD_PADSA, VDD_CORE, and VDD_FLASH.
In addition, the regulator can be operated with several configurations of external load capacitors and decoup-
ling capacitors. The EM260 Reference Design details the different configurations recommended by Ember.
Spec Point
Supply range for regulator
Regulated output
PSRR
Supplied current
Current
Quiescent current
Table 14. Integrated Voltage Regulator Specifications
Min.
2.1
1.7
0
Typ.
1.8
200
10
Max.
3.6
1.9
- 40
50
V
Units
V
dB
mA
µA
nA
Comments
VDD_PADS
@100KHz
No load current (bandgap, regulator,
feedback)
N
prescaler to generate a final timer resolu-
120-1003-000D
EM260
21