LFE2-20E-5FN484C Lattice, LFE2-20E-5FN484C Datasheet - Page 107
LFE2-20E-5FN484C
Manufacturer Part Number
LFE2-20E-5FN484C
Description
FPGA - Field Programmable Gate Array 21K LUTs 331 I/O DSP 1.2V -5
Manufacturer
Lattice
Series
LatticeECP2r
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2-20E-5FN484C
Number Of Macrocells
21000
Number Of Programmable I/os
331
Data Ram Size
282624
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
No. Of Logic Blocks
21000
No. Of Macrocells
10500
No. Of Speed Grades
5
Total Ram Bits
276Kbit
No. Of I/o's
331
Clock Management
DLL, PLL
I/o Supply Voltage
3.465V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Price
Company:
Part Number:
LFE2-20E-5FN484C
Manufacturer:
Lattice
Quantity:
135
Company:
Part Number:
LFE2-20E-5FN484C
Manufacturer:
TI
Quantity:
2 658
Company:
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LFE2-20E-5FN484C
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Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LFE2-20E-5FN484C
Manufacturer:
LATTICE
Quantity:
20 000
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Lattice Semiconductor
PICs and DDR Data (DQ) Pins Associated with the DDR Strobe (DQS) Pin
For Left and Right Edges of the Device
P[Edge] [n-4]
P[Edge] [n-3]
P[Edge] [n-2]
P[Edge] [n-1]
P[Edge] [n]
P[Edge] [n+1]
P[Edge] [n+2]
P[Edge] [n+3]
For Bottom Edge of the Device
P[Edge] [n-4]
P[Edge] [n-3]
P[Edge] [n-2]
P[Edge] [n-1]
P[Edge] [n]
P[Edge] [n+1]
P[Edge] [n+2]
P[Edge] [n+3]
P[Edge] [n+4]
Notes:
1. “n” is a row PIC number.
2. The DDR interface is designed for memories that support one DQS strobe up to 15 bits
PICs Associated with
of data for the left and right edges and up to 17 bits of data for the bottom edge. In some
packages, all the potential DDR data (DQ) pins may not be available. PIC numbering
definitions are provided in the “Signal Names” column of the Signal Descriptions table.
DQS Strobe
PIO Within PIC
4-4
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
DDR Strobe (DQS) and
LatticeECP2/M Family Data Sheet
Data (DQ) Pins
[Edge]DQSn
[Edge]DQSn
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
Pinout Information
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