LFE2-20E-5FN484C Lattice, LFE2-20E-5FN484C Datasheet - Page 141

• Manufacturer Part Number: LFE2-20E-5FN484C
• Description: FPGA - Field Programmable Gate Array 21K LUTs 331 I/O DSP 1.2V -5
• Manufacturer: Lattice
• Series: LatticeECP2r

Specifications of LFE2-20E-5FN484C

• Number Of Macrocells: 21000
• Number Of Programmable I/os: 331
• Data Ram Size: 282624
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• No. Of Logic Blocks: 21000
• No. Of Macrocells: 10500
• No. Of Speed Grades: 5
• Total Ram Bits: 276Kbit
• No. Of I/o's: 331
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.465V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
LFE2-6E/SE and LFE2-12E/SE Logic Signal Connections: 256 fpBGA (Cont.)
Number
* Supports true LVDS. Other differential signals must be emulated with external resistors.
** These dedicated input pins can be used for GPLLs or GDLLs within the respective quadrant.
Note: VCCIO and GND pads are used to determine the average DC current drawn by I/Os between GND/VCCIO connections, or between the
last GND/VCCIO in an I/O bank and the end of an I/O bank. The substrate pads listed in the Pin Table do not necessarily have a one to one
connection with a package ball or pin.
Ball
R12
T16
R5
T1
Function
Ball/Pad
GND
GND
GND
GND
Bank
LFE2-6E/SE
-
-
-
-
Dual Function
Differential
4-38
Function
Ball/Pad
GND
GND
GND
GND
LatticeECP2/M Family Data Sheet
Bank
-
-
-
-
LFE2-12E/SE
Dual Function
Pinout Information
Differential