LFE2-20E-5FN484C Lattice, LFE2-20E-5FN484C Datasheet - Page 189

• Manufacturer Part Number: LFE2-20E-5FN484C
• Description: FPGA - Field Programmable Gate Array 21K LUTs 331 I/O DSP 1.2V -5
• Manufacturer: Lattice
• Series: LatticeECP2r

Specifications of LFE2-20E-5FN484C

• Number Of Macrocells: 21000
• Number Of Programmable I/os: 331
• Data Ram Size: 282624
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• No. Of Logic Blocks: 21000
• No. Of Macrocells: 10500
• No. Of Speed Grades: 5
• Total Ram Bits: 276Kbit
• No. Of I/o's: 331
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.465V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
LFE2-20E/SE and LFE2-35E/SE Logic Signal Connections: 672 fpBGA
Number
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
GND
GND
GND
GND
GND
GND
G10
Ball
F11
E10
H10
F10
D9
C7
D7
H9
C5
D5
C4
C3
D4
D3
C2
C1
G8
G7
G6
G5
E9
A5
B5
E8
F8
B4
A4
A3
B3
B2
E7
F7
E6
E5
Function
Ball/Pad
GNDIO0
GNDIO0
GNDIO0
GNDIO0
GNDIO0
GNDIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
PT21B
PT21A
PT20B
PT20A
PT19B
PT19A
PT18B
PT18A
PT17B
PT17A
PT16B
PT16A
PT15B
PT15A
PT14B
PT14A
PT13B
PT10B
PT10A
PT9B
PT9A
PT8B
PT8A
PT7B
PT7A
PT6B
PT6A
PT5B
PT5A
PT4B
PT4A
PT3B
PT3A
PT2B
PT2A
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
LFE2-20E/20SE
Dual Function
VREF2_0
VREF1_0
Differential
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
4-86
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Function
Ball/Pad
GNDIO0
VCCIO0
GNDIO0
VCCIO0
GNDIO0
VCCIO0
GNDIO0
VCCIO0
GNDIO0
VCCIO0
GNDIO0
VCCIO0
PT21B
PT21A
PT20B
PT20A
PT19B
PT19A
PT18B
PT18A
PT17B
PT17A
PT16B
PT16A
PT15B
PT15A
PT14B
PT14A
PT13B
PT10B
PT10A
PT9B
PT9A
PT8B
PT8A
PT7B
PT7A
PT6B
PT6A
PT5B
PT5A
PT4B
PT4A
PT3B
PT3A
PT2B
PT2A
LatticeECP2/M Family Data Sheet
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
LFE2-35E/35SE
Dual Function
VREF2_0
VREF1_0
Pinout Information
Differential
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T