LFE2-20E-5FN484C Lattice, LFE2-20E-5FN484C Datasheet - Page 215

• Manufacturer Part Number: LFE2-20E-5FN484C
• Description: FPGA - Field Programmable Gate Array 21K LUTs 331 I/O DSP 1.2V -5
• Manufacturer: Lattice
• Series: LatticeECP2r

Specifications of LFE2-20E-5FN484C

• Number Of Macrocells: 21000
• Number Of Programmable I/os: 331
• Data Ram Size: 282624
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• No. Of Logic Blocks: 21000
• No. Of Macrocells: 10500
• No. Of Speed Grades: 5
• Total Ram Bits: 276Kbit
• No. Of I/o's: 331
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.465V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LFE2-70E/SE Logic Signal Connections: 900 fpBGA (Cont.)
Lattice Semiconductor
Ball Number
VCCIO
VCCIO
VCCIO
VCCIO
GND
GND
GND
GND
AD6
AD1
AA6
AA8
AA2
AA1
AA7
AA5
AA4
AA3
AB7
AB5
AB2
AB1
AB8
AB6
AB4
AB3
AC7
AC5
AC2
AC1
AC6
W7
W4
W3
W6
W8
Y8
Y1
Y2
Y5
Y6
Y4
Y3
Ball/Pad Function
LLM0_PLLCAP
GNDIO6
GNDIO6
GNDIO6
GNDIO6
VCCIO6
VCCIO6
VCCIO6
VCCIO6
PL72B
PL73A
PL73B
PL74A
PL74B
PL76A
PL76B
PL77A
PL77B
PL78A
PL78B
PL79A
PL79B
PL80A
PL80B
PL81A
PL81B
PL82A
PL82B
PL83A
PL83B
PL84A
PL84B
PL85A
PL85B
PL86A
PL86B
PL87A
PL87B
PL88A
PL88B
PL89A
PL89B
PL90A
LFE2-70E/SE
Bank
4-112
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
-
-
-
-
LLM0_GDLLC_IN_A**/LDQ71
LLM0_GPLLC_IN_A**/LDQ80
LLM0_GDLLT_IN_A**/LDQ71
LLM0_GPLLT_IN_A**/LDQ80
LLM0_GDLLC_FB_D/LDQ71
LLM0_GPLLC_FB_A/LDQ80
LLM0_GDLLT_FB_A/LDQ71
LLM0_GPLLT_FB_A/LDQ80
LatticeECP2/M Family Data Sheet
Dual Function
LDQS80
LDQS88
LDQ71
LDQ80
LDQ80
LDQ80
LDQ80
LDQ80
LDQ80
LDQ80
LDQ80
LDQ80
LDQ80
LDQ80
LDQ88
LDQ88
LDQ88
LDQ88
LDQ88
LDQ88
LDQ88
LDQ88
LDQ88
LDQ88
LDQ88
LDQ88
Pinout Information
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T