LFXP3C-3TN144I Lattice, LFXP3C-3TN144I Datasheet - Page 178
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFXP3C-3TN144I
Manufacturer Part Number
LFXP3C-3TN144I
Description
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V IND
Manufacturer
Lattice
Specifications of LFXP3C-3TN144I
Number Of Programmable I/os
100
Data Ram Size
55296
Supply Voltage (max)
3.465 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.71 V
Package / Case
TQFP-144
Package
144TQFP
Family Name
LatticeXP
Device Logic Units
3000
Maximum Internal Frequency
320 MHz
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Maximum Number Of User I/os
100
Ram Bits
55296
Re-programmability Support
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP3C-3TN144I
Manufacturer:
INTEL
Quantity:
1 143
Company:
Part Number:
LFXP3C-3TN144I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 178 of 397
- Download datasheet (10Mb)
Lattice Semiconductor
True Dual Port RAM (RAM_DP_TRUE) – EBR Based
The EBR blocks in the LatticeECP/EC and LatticeXP devices can be configured as True-Dual Port RAM or
RAM_DP_TRUE. IPexpress allows users to generate the Verilog-HDL, VHDL or EDIF netlists for the memory size
as per design requirements.
IPexpress generates the memory module as shown in Figure 9-15.
Figure 9-15. True Dual Port Memory Module Generated by IPexpress
The generated module makes use of the RAM_DP_TRUE primitive. For memory sizes smaller than one EBR
block, the module will be created in one EBR block. In cases where the specified memory is larger than one EBR
block, multiple EBR blocks can be cascaded, in depth or width (as required to create these sizes).
The basic memory primitive for the LatticeECP/EC and LatticeXP devices, RAM_DP_TRUE, is shown in Figure 9-
16.
Figure 9-16. True Dual Port RAM Primitive or RAM_DP_TRUE for LatticeECP/EC and LatticeXP Devices
In True Dual Port RAM mode, the input data and address for the ports are registered at the input of the memory
array. The output data of the memory is optionally registered at the output.
ADA[x:0]
WrAddressA
DOA[y:0]
CSA[2:0]
DIA[y:0]
ClockEnA
RSTA
CLKA
ResetA
WEA
ClockA
CEA
DataA
WEA
QA
Dual Port Memory
EBR-based True
RAM_DP_TRUE
9-13
EBR
LatticeECP/EC and LatticeXP Devices
ClockB
ClockEnB
ResetB
WEB
WrAddressB
DataB
QB
CLKB
CEB
RSTB
WEB
CSB[2:0]
DOB[y:0]
ADB[x:0]
DIB[y:0]
Memory Usage Guide
Related parts for LFXP3C-3TN144I
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LFXP3C-3TN100I](/photos/16/2/160258/tqfp-100_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
Manufacturer:
Lattice
Datasheet:
![LFXP3C-3Q208I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.8 /2.5/3.3V -3 Spd I
Manufacturer:
Lattice
![LFXP3C-3T100I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
Manufacturer:
Lattice
![LFXP3C-3Q208C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.8 /2.5/3.3V -3 Spd
Manufacturer:
Lattice
![LFXP3C-3T144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V -3 Spd
Manufacturer:
Lattice
Datasheet:
![LFXP3C-3TN144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 100 I/O
Manufacturer:
Lattice
Datasheet:
![LFXP3C-3QN208C](/photos/16/15/161504/qfp208_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 136 I/O
Manufacturer:
Lattice
Datasheet:
![LFXP3C-4TN144C](/photos/16/14/161488/tqfp-144_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V -4 Spd
Manufacturer:
Lattice
Datasheet:
![LFXP3C-3TN100C](/photos/16/2/160258/tqfp-100_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 62 I/O
Manufacturer:
Lattice
Datasheet:
![LFXP3C-4TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 I/O 1.8/2.5/3.3V -4 Spd
Manufacturer:
Lattice
Datasheet:
![LFXP3C-5TN100C](/photos/16/2/160258/tqfp-100_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 62 I/O
Manufacturer:
Lattice
Datasheet:
![LFXP3C-5TN144C](/photos/19/4/190401/ge144tqfp05-40_tmb.jpg)
Part Number:
Description:
FPGA, 1.8V FLASH, INSTANT ON, SMD
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP3C-3QN208I](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 208-Pin PQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP3C-3T144I](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 144-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFXP3C-4T100I](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 360MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 100-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet: