DP83865DVH National Semiconductor, DP83865DVH Datasheet - Page 15

10/100/1000BASE-T TRANSCEIVER, SMD

DP83865DVH

Manufacturer Part Number
DP83865DVH
Description
10/100/1000BASE-T TRANSCEIVER, SMD
Manufacturer
National Semiconductor
Datasheets

Specifications of DP83865DVH

Data Rate
1000Mbps
No. Of Ports
1
Ethernet Type
IEEE 802.3u, IEEE 802.3z
Supply Current
430µA
Supply Voltage Range
2.375V To 2.625V, 3.135V To 3.465V
Operating Temperature Range
0°C To +70°C
Interface Type
GMII, MII, RGMII
Rohs Compliant
Yes
Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
1.0 Pin Description
Pin #
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
RX_CLK
IO_VDD
VSS
TX_CLK/RGMII_SEL1
TX_ER
TX_EN/TXEN_ER
CORE_VDD
VSS
TXD7
TXD6
TXD5
TXD4
IO_VDD
VSS
TXD3/TX3
TXD2/TX2
CORE_VDD
VSS
TXD1/TX1
TXD0/TX0
IO_VDD
VSS
Data Sheet Pin Name
(Continued)
Table 1.
15
Ground Ground: Connect to common ground plane.
Ground Ground: Connect to common ground plane.
Ground Ground: Connect to common ground plane.
Ground Ground: Connect to common ground plane.
Ground Ground: Connect to common ground plane.
Output
Output
Power
Power
Power
Power
Power
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Receive Clock/ Receive Byte Clock 1: Con-
nect to MAC chip through a single 50
ance trace. This output is capable of driving 35
pf load and is not intended to drive connectors,
cables, backplanes or multiple traces. This ap-
plies if the part is in 100 Mbps mode or 1000
Mbps mode.
I/O VDD: (Digital) Connect to 2.5V or 3.3V. The
VDD_SEL pin must be tied accordingly.
Transmit Clock: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF.
Transmit Error: Connect to MAC chip through a
single 50
typical input capacitance of 6 pF.
Transmit Enable: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF.
Core VDD: (Digital) Connect to 1.8V.
Transmit Data 7: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF.
Transmit Data 6: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Transmit Data 5: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Transmit Data 4: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
I/O VDD: (Digital) Connect to 2.5V or 3.3V. The
VDD_SEL pin must be tied accordingly.
Transmit Data 3: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Transmit Data 2: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Core VDD: (Digital) Connect to 1.8V.
Transmit Data 1: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
Transmit Data 0: Connect to MAC chip through
a single 50
typical input capacitance of 6 pF
I/O VDD: (Digital) Connect to 2.5V or 3.3V. The
VDD_SEL pin must be tied accordingly.
Connection / Comment
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
impedance trace. This input has a
www.national.com
imped-

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