EVAL-ADUC842QSZ Analog Devices Inc, EVAL-ADUC842QSZ Datasheet - Page 31

• Manufacturer Part Number: EVAL-ADUC842QSZ
• Description: Analog MCU Evaluation Board
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC842QSZ

• Silicon Manufacturer: Analog Devices
• Core Architecture: 8052
• Silicon Core Number: ADuC842
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: ADUC8xx
• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• Development Tool Type: Hardware - Eval/Demo Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC824
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Initiating the Calibration in Code
When calibrating the ADC using ADCCON1, the ADC must be
set up into the configuration in which it will be used. The
ADCCON3 register can then be used to set up the device and to
calibrate the ADC offset and gain.
MOV ADCCON1,#08CH ;
To calibrate device offset:
MOV ADCCON2,#0BH
MOV ADCCON3,#25H
To calibrate device gain:
MOV ADCCON2,#0CH
MOV ADCCON3,#27H
To calibrate system offset, connect system AGND to an ADC
channel input (0).
MOV ADCCON2,#00H
MOV ADCCON3,#25H
To calibrate system gain, connect system V
channel input (1).
MOV ADCCON2,#01H
MOV ADCCON3,#27H
The calibration cycle time T
equation:
For an ADCCLK/FCORE divide ratio of 32, T
and NUMAV = 15, the calibration cycle time is
In a calibration cycle, the ADC busy flag (Bit 7), instead of
framing an individual ADC conversion as in normal mode, goes
high at the start of calibration and returns to zero only at the
end of the calibration cycle. It can therefore be monitored in
code to indicate when the calibration cycle is completed. The
following code can be used to monitor the BUSY signal during
a calibration cycle:
WAIT:
MOV A, ADCCON3
JB ACC.7, WAIT
T
T
T
CAL
CAL
CAL
=
=
=
14
14
8
ms
×
×
ADCCLK
(
/ 1
524288
×
ADC on; ADCCLK set
;to divide by 32,4
;acquisition clock
;select internal AGND
;select offset calibration,
;31 averages per bit,
;offset calibration
;select internal V
;select offset calibration,
;31 averages per bit,
;offset calibration
;select external AGND
;select offset calibration,
;31 averages per bit
;select external V
;select offset calibration,
;31 averages per bit,
;offset calibration
CAL
NUMAV
)
×
;move ADCCON3 to A
;If Bit 7 is set jump to
WAIT else continue
15
is calculated by the following
×
(
16
×
(
+
16
4
REF
+
)
T
to an ADC
ACQ
ACQ
)
= 4 ADCCLK,
REF
REF
Rev. 0 | Page 31 of 88
NONVOLATILE FLASH/EE MEMORY
The ADuC841/ADuC842/ADuC843 incorporate Flash/EE
memory technology on-chip to provide the user with nonvola-
tile, in-circuit, reprogrammable code and data memory space.
Flash/EE memory is a relatively recent type of nonvolatile
memory technology, which is based on a single transistor cell
architecture. Flash/EE memory combines the flexible in-circuit
reprogrammable features of EEPROM with the space efficient/
density features of EPROM as shown in Figure 37.
Because Flash/EE technology is based on a single transistor cell
architecture, a flash memory array, such as EPROM, can be
implemented to achieve the space efficiencies or memory densities
required by a given design. Like EEPROM, flash memory can be
programmed in-system at a byte level; it must first be erased,
the erase being performed in page blocks. Thus, flash memory
is often and more correctly referred to as Flash/EE memory.
Overall, Flash/EE memory represents a step closer to the ideal
memory device that includes nonvolatility, in-circuit program-
mability, high density, and low cost. Incorporated in the parts,
Flash/EE memory technology allows the user to update program
code space in-circuit, without the need to replace one-time
programmable (OTP) devices at remote operating nodes.
Flash/EE Memory and the ADuC841/ADuC842/ADuC843
The parts provide two arrays of Flash/EE memory for user
applications. Up to 62 kBytes of Flash/EE program space are
provided on-chip to facilitate code execution without any
external discrete ROM device requirements. The program
memory can be programmed in-circuit by using the serial
download mode provided, by using conventional third party
memory programmers, or via a user defined protocol that can
configure it as data if required.
Note that the following sections use the 62 kByte program space
as an example when referring to ULOAD mode. For the other
memory models (32 kByte and 8 kByte), the ULOAD space
moves to the top 8 kBytes of the on-chip program memory, i.e.,
for 32 kBytes, the ULOAD space is from 24 kBytes to 32 kBytes,
the kernel still resides in a protected space from 60 kBytes to
62 kBytes. There is no ULOAD space present on the 8 kBtye part.
SPACE EFFICIENT/
DENSITY
TECHNOLOGY
Figure 37. Flash/EE Memory Development
EPROM
ADuC841/ADuC842/ADuC843
FLASH/EEMEMORY
TECHNOLOGY
TECHNOLOGY
REPROGRAMMABLE
EEPROM
IN-CIRCUIT