EVAL-ADUC842QSZ Analog Devices Inc, EVAL-ADUC842QSZ Datasheet - Page 68

• Manufacturer Part Number: EVAL-ADUC842QSZ
• Description: Analog MCU Evaluation Board
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC842QSZ

• Silicon Manufacturer: Analog Devices
• Core Architecture: 8052
• Silicon Core Number: ADuC842
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: ADUC8xx
• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• Development Tool Type: Hardware - Eval/Demo Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC824
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADuC841/ADuC842/ADuC843
Timer 3 Generated Baud Rates
The high integer dividers in a UART block mean that high
speed baud rates are not always possible using some particular
crystals. For example, using a 12 MHz crystal, a baud rate of
115200 is not possible. To address this problem, the part has
added a dedicated baud rate timer (Timer 3) specifically for
generating highly accurate baud rates. Timer 3 can be used
instead of Timer 1 or Timer 2 for generating very accurate high
speed UART baud rates including 115200 and 230400. Timer 3
also allows a much wider range of baud rates to be obtained. In
fact, every desired bit rate from 12 bit/s to 393216 bit/s can be
generated to within an error of ±0.8%. Timer 3 also frees up the
other three timers, allowing them to be used for different
applications. A block diagram of Timer 3 is shown in Figure 74.
Two SFRs (T3CON and T3FD) are used to control Timer 3.
T3CON is the baud rate control SFR, allowing Timer 3 to be
used to set up the UART baud rate, and setting up the binary
divider (DIV).
Table 33. T3CON SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
FRACTIONAL
DIVIDER
CORE
CLK
Name
T3BAUDEN
DIV2
DIV1
DIV0
(1 + T3FD/64)
Figure 74. Timer 3, UART Baud Rates
2
16
DIV
2
T3 RX/TX
CLOCK
RX CLOCK
TIMER 1/TIMER 2
Description
T3UARTBAUD Enable.
Set to enable Timer 3 to generate the baud rate. When set, PCON.7, T2CON.4, and T2CON.5 are ignored.
Cleared to let the baud rate be generated as per a standard 8052.
Reserved.
Reserved.
Reserved.
Reserved.
Binary Divider Factor.
DIV2
0
0
0
0
1
1
1
1
1
1
TX CLOCK
0
0
TIMER 1/TIMER 2
T3EN
DIV1
0
0
1
1
0
0
1
1
RX CLOCK
TX CLOCK
Rev. 0 | Page 68 of 88
DIV0
0
1
0
1
0
1
0
1
The appropriate value to write to the DIV2-1-0 bits can be
calculated using the following formula where f
PLLCON SFR. Note that the DIV value must be rounded down.
T3FD is the fractional divider ratio required to achieve the
required baud rate. The appropriate value for T3FD can be
calculated with the following formula:
Note that T3FD should be rounded to the nearest integer. Once
the values for DIV and T3FD are calculated, the actual baud rate
can be calculated with the following formula:
For example, to get a baud rate of 115200 while operating at
16.7 MHz, i.e., CD = 0
Therefore, the actual baud rate is 114912 bit/s.
Bin Divider
1
1
1
1
1
1
1
1
T
T
DIV
DIV
Actual
3
3
FD
FD
=
=
log
=
=
log
Baud
(
⎛
⎜ ⎜
⎝
2
2
16
(
16777216
DIV
×
×
log
16777216
Baud
f
−
CORE
Rate
2
1
( )
2
×
×
Baud
Rate
f
CORE
=
/
(
2
16
)
⎞
⎟ ⎟
⎠
/
DIV
(
Rate
2
×
2
−
115200
1
×
2
×
115200
×
−
(
T
64
f
3
CORE
FD
)
)
/
)
log
−
+
64
64
CORE
2
=
=
)
is defined in
. 3
9
18
=
09
=
H
3