AD9520-3BCPZ Analog Devices Inc, AD9520-3BCPZ Datasheet - Page 15

• Manufacturer Part Number: AD9520-3BCPZ
• Description: 12/24 Channel Clock Gen 2,0GH
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9520-3BCPZ

• Design Resources: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
• Pll: Yes
• Input: CMOS, LVDS, LVPECL
• Output: CMOS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 2:12, 2:24
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.25GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.25GHz
• Function: Clock Generator
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: LFCSP EP
• Pin Count: 64
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PD , SYNC , AND RESET PINS
Table 15.
Parameter
INPUT CHARACTERISTICS
RESET TIMING
SYNC TIMING
SERIAL PORT SETUP PINS: SP1, SP0
Table 16.
Parameter
SP1, SP0
LD, STATUS, AND REFMON PINS
Table 17.
Parameter
OUTPUT CHARACTERISTICS
MAXIMUM TOGGLE RATE
ANALOG LOCK DETECT
REF1, REF2, AND VCO FREQUENCY STATUS MONITOR
LD PIN COMPARATOR
Logic Level ½
Output Voltage High, V
Output Voltage Low, V
Capacitance
Normal Range
Extended Range
Trip Point
Hysteresis
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Capacitance
Pulse Width Low
RESET Inactive to Start of Register Programming
Pulse Width Low
Logic Level 0
Logic Level 1
Min
0.4 × VS
0.8 × VS
OL
OH
Typ
Max
0.25 × VS
0.65 × VS
Unit
V
V
V
Min
2.7
1.02
8
Min
2.0
50
100
1.3
Typ
100
3
1.6
260
Typ
−110
2
Test Conditions/Comments
These pins do not have internal pull-up/pull-down resistors
VS is the voltage on the VS pin
User can float these pins to obtain Logic Level ½; if floating this pin, user
should connect a capacitor to ground
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Max
0.4
Max
0.8
1
Unit
V
V
MHz
pF
MHz
kHz
V
mV
Unit
V
V
μA
μA
pF
ns
ns
ns
Test Conditions/Comments
When selected as a digital output (CMOS); there are other
modes in which these pins are not CMOS digital outputs;
see Table 53, 0x017, 0x01A, and 0x01B
Applies when mux is set to any divider or counter output,
or PFD up/down pulse; also applies in analog lock detect
mode; usually debug mode only; beware that spurs can
couple to output when any of these pins are toggling
On-chip capacitance; used to calculate RC time constant
for analog lock detect readback; use a pull-up resistor
Frequency above which the monitor indicates the
presence of the reference
Frequency above which the monitor indicates the
presence of the reference
Test Conditions/Comments
These pins each have a 30 kΩ internal pull-up resistor
The minus sign indicates that current is flowing out of
the AD9520, which is due to the internal pull-up resistor
High speed clock is CLK input signal
AD9520-3