ADUC7020BCPZ62I-RL Analog Devices Inc, ADUC7020BCPZ62I-RL Datasheet - Page 34

IC,MICROCONTROLLER,16-BIT,ARM7 CPU,CMOS,LLCC,40PIN,PLASTIC

ADUC7020BCPZ62I-RL

Manufacturer Part Number
ADUC7020BCPZ62I-RL
Description
IC,MICROCONTROLLER,16-BIT,ARM7 CPU,CMOS,LLCC,40PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7020BCPZ62I-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
44MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
PLA, PWM, PSM, Temp Sensor, WDT
Number Of I /o
14
Program Memory Size
62KB (62K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 5x12b; D/A 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADUC7020QSZ - KIT DEV ADUC7020 QUICK STARTEVAL-ADUC7020MKZ - KIT MINI DEV FOR ADUC7026/7027
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7020BCPZ62I-RL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADuC7019/20/21/22/24/25/26/27/28/29
TERMINOLOGY
ADC SPECIFICATIONS
Integral Nonlinearity (INL)
The maximum deviation of any code from a straight line
passing through the endpoints of the ADC transfer function.
The endpoints of the transfer function are zero scale, a point
½ LSB below the first code transition, and full scale, a point
½ LSB above the last code transition.
Differential Nonlinearity (DNL)
The difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
The deviation of the first code transition (0000 . . . 000) to
(0000 . . . 001) from the ideal, that is, +½ LSB.
Gain Error
The deviation of the last code transition from the ideal AIN
voltage (full scale − 1.5 LSB) after the offset error has been
adjusted out.
Signal to (Noise + Distortion) Ratio (SINAD)
The measured ratio of signal to (noise + distortion) at the
output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the rms sum of all nonfundamental
signals up to half the sampling frequency (f
S
/2), excluding dc.
Rev. C | Page 34 of 96
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the
quantization noise.
The theoretical signal to (noise + distortion) ratio for an ideal
N-bit converter with a sine wave input is given by
Thus, for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion (THD)
The ratio of the rms sum of the harmonics to the fundamental.
DAC SPECIFICATIONS
Relative Accuracy
Otherwise known as endpoint linearity, relative accuracy is a
measure of the maximum deviation from a straight line passing
through the endpoints of the DAC transfer function. It is
measured after adjusting for zero error and full-scale error.
Voltage Output Settling Time
The amount of time it takes the output to settle to within a
1 LSB level for a full-scale input change.
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB

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