EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 51
EP3SL150F780I3N
Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet
1.EP3SL110.pdf
(904 pages)
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Figure 2–13. ALM in Shared Arithmetic Mode
Altera Corporation
October 2007
datae0
datae1
datab
dataa
datad
datac
Shared Arithmetic Mode
In shared arithmetic mode, the ALM can implement a three-input add
within an ALM. In this mode, the ALM is configured with 4 four-input
LUTs. Each LUT either computes the sum of three inputs or the carry of
three inputs. The output of the carry computation is fed to the next adder
(either to adder1 in the same ALM or to adder0 of the next ALM in the
LAB) via a dedicated connection called the shared arithmetic chain. This
shared arithmetic chain can significantly improve the performance of an
adder tree by reducing the number of summation stages required to
implement an adder tree.
You can find adder trees in many different applications. For example, the
summation of the partial products in a logic-based multiplier can be
implemented in a tree structure. Another example is a correlator function
that can use a large adder tree to sum filtered data samples in a given time
frame to recover or to de-spread data that was transmitted utilizing
spread spectrum technology.
4-Input
4-Input
4-Input
4-Input
Logic Array Blocks and Adaptive Logic Modules in Stratix III Devices
LUT
LUT
LUT
LUT
shared_arith_out
shared_arith_in
carry_out
carry_in
Figure 2–13
labclk
D
D
Stratix III Device Handbook, Volume 1
reg0
reg1
shows the ALM using this feature.
Q
Q
To general or
To general or
To general or
To general or
local routing
local routing
local routing
local routing
2–17
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