EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 64

• Manufacturer Part Number: EP3SL150F780I3N
• Description: Stratix III
• Manufacturer: Altera

Column Interconnects
3–6
Stratix III Device Handbook, Volume 1
Shared
arithmetic
chain
Carry chain
Register chain
Local
interconnect
Direct link
interconnect
R4
interconnect
R20
interconnect
C4
interconnect
C12
interconnect
ALM
MLAB RAM
block
M9K RAM
block
M144K block
Table 3–1. Stratix III Device Routing Scheme (Part 1 of 2)
Source
Shared
Arith-
Chain
metic
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—
—
—
—
—
—
—
—
—
Chain
Carry
v
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—
—
—
—
—
—
—
—
—
—
—
Regis-
Chain
C12 column interconnects span a length of 12 LABs and provide the
fastest resource for column connections between distant LABs, TriMatrix
memory blocks, DSP blocks, and IOEs. C12 interconnects drive LAB local
interconnects via C4 and R4 interconnects and do not drive LAB local
interconnects directly.
All embedded blocks communicate with the logic array through
interconnects similar to LAB-to-LAB interfaces. Each block (for example,
TriMatrix memory blocks and DSP blocks) connects to row and column
interconnects and has local interconnect regions driven by row and
column interconnects. These blocks also have direct link interconnects for
fast connections to and from a neighboring LAB.
Table 3–1
v
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—
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—
—
—
—
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—
ter
connect
Local
Inter-
v
v
(1)
v
(2)
v
v
(3)
v
v
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—
—
—
—
shows the Stratix III device's routing scheme.
connect
Direct
Inter-
Link
—
—
—
—
—
—
—
—
—
v
v
v
v
connect
Inter-
—
—
—
—
—
v
v
v
v
v
v
v
v
R4
connect
Inter-
R20
v
v
v
—
—
—
—
—
—
—
—
—
—
Destination
connect
Inter-
v
v
v
v
v
v
v
v
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—
—
—
C4
connect
Inter-
C12
v
v
v
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—
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—
ALM
v
v
v
v
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—
—
—
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—
—
MLAB
Block
RAM
—
—
—
v
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—
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—
—
—
—
—
—
Block
M9K
RAM
—
—
—
v
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—
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—
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—
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—
Altera Corporation
M144K
Block
October 2007
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Blocks
DSP
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umn
Col-
v
IOE
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—
Row
v
IOE
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