TMC2072-MD SMSC, TMC2072-MD Datasheet - Page 29

• Manufacturer Part Number: TMC2072-MD
• Description: Network Controller & Processor ICs Peripheral Mode CircLink Cntlr
• Manufacturer: SMSC

Specifications of TMC2072-MD

• Product: Controller Area Network (CAN)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Peripheral Mode CircLink™ Controller
Datasheet
2.5.1
SMSC TMC2072
RAM Access
The CPU accesses the packet buffer (RAM) through the COMR4 register. Prior to access, a read or write
and page number need to be specified using the COMR2 register, as well as the address specification in
the page using the COMR3 register. The accessing method varies depending on the bit width of data bus,
word mode, and swap mode.
(1) Data bus = 16bits (W16 pin=H)
(2-a) Data bus = 8bits , Word mode=OFF
(W16 pin=L, WDMD=0 in MODE REG.)
COMR2 Register : RDDATA AUTOINC nWRAPAR PAGE[4:0]
COMR3 Register : Address within a page RAMADR[7:0]
COMR4 Register : Packet Data RAMDT[7:0]
A/AD[5:0] = 04h (05h) *
A/AD[5:0] = 06h (07h) *
A/AD[5:0] = 08h or 09h
COMR2 Register : RDDATA, AUTOINC, nWRAPAR, PAGE[4;0]
COMR3 Register : Address Within a page RAMADR[7:0]
COM4 Register : Packet Data RAMDT[15:0]
A/AD[5:0] = 04h
A/AD[5:0] = 06h
A/AD[5:0] = 08h
( )*:nSWAP=L
DATASHEET
RD. A.I. nW.A 4
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Revision 0.1 (06-07-07)
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