TMC2072-MD SMSC, TMC2072-MD Datasheet - Page 52
TMC2072-MD
Manufacturer Part Number
TMC2072-MD
Description
Network Controller & Processor ICs Peripheral Mode CircLink Cntlr
Manufacturer
SMSC
Datasheet
1.TMC2072-MT.pdf
(106 pages)
Specifications of TMC2072-MD
Product
Controller Area Network (CAN)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Peripheral Mode CircLink™ Controller
Datasheet
In Peripheral mode, the CM node ID is set in a register after cancellation of Hardware Reset. After these
values are imported, output is 1 until it assumes itself as a CM node (it becomes 0 after that). During
Software Reset, due to the CM Node ID being immediately imported, the CM Node ID is fixed at 1→0
immediately after being set up in the register.
Unlock Phase difference register
The phase difference between the NST in the CM node and the NST in the subject node can be monitored
through the NSTDIF register.
DIFDIR (NSTDIF register: bit 15)
Indicating the direction of phase difference
0: Ahead of CM node 1: Behind of CM node
NSTDIF 14-0 (NSTDIF register: bit 14-0)
Absolute difference from the CM node is indicated as the value from 0 to 32,768.
Accessing the NSTDIF register can dynamically provide the latest time data. Since NSTDIF is a 16 bit
value, it is necessary to read the even address side (32h) first when 8-bit bus is used. When the even
address is read out, the remaining 8 bits of the NST are latched internally.
Revision 0.1 (06-07-07)
Page 52
SMSC TMC2072
DATASHEET
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