TMC2072-MD SMSC, TMC2072-MD Datasheet - Page 59

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TMC2072-MD

Manufacturer Part Number
TMC2072-MD
Description
Network Controller & Processor ICs Peripheral Mode CircLink Cntlr
Manufacturer
SMSC
Datasheet

Specifications of TMC2072-MD

Product
Controller Area Network (CAN)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Peripheral Mode CircLink™ Controller
Datasheet
2.14
SMSC TMC2072
8bit General-purpose I/O Port (New Function)
When CircLink is used in the Peripheral mode, 11* or more General-purpose I/O ports (GP-I/O) are utilized
as the CPU interface with CircLink (* at 8bit data bus and Multiplex bus mode).
Eight GP-I/Os are added to the CircLink side as the substitution. (GPIO7-0 pins).
Two registers, named "Direction control register" and "Data register", are added for the GP-I/O control. To
allocate these registers in COMR7 (Address=0Eh), the sub address is enhanced by one bit (SUBAD3).
- Sub address register -> Sub Address : SUBAD3-0 (Address=0Ah)
- Direction Control register -> GP-I/O Direction : nGPOE7-0 (Address=0Eh, SUBAD=1011)
- Data register -> GP-I/O Data : GPD7-0 (Address=0Eh, SUBAD=1010)
GP-I/O Data register
GP-I/O Direction -
(0: Output , 1: Input)
The sub address is enhanced by SUBAD3 bit
GP-I/O Direction Control register --- The direction can be set by every one bit.
GP-I/O Data register
nGPOE x
Control register
GPD x
(x : 0-7)
nGPOEx = 0 : Output mode
nGPOEx = 1 : Input mode
GPD7-0 : Write operation ----
: Read operation ----
DATASHEET
D
D
S
R
Page 59
Q
Q
Write data that outputs to GPIP7-0 pin
Read the state of the GPIO7-0 pin
4mA
TTL
Vdd
GPIO x pins
(x : 0-7)
Revision 0.1 (06-07-07)
GP-I/O diagram
(per 1bit)

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