TMC2072-MD SMSC, TMC2072-MD Datasheet - Page 89

• Manufacturer Part Number: TMC2072-MD
• Description: Network Controller & Processor ICs Peripheral Mode CircLink Cntlr
• Manufacturer: SMSC

Specifications of TMC2072-MD

• Product: Controller Area Network (CAN)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Peripheral Mode CircLink™ Controller
Datasheet
NOTE:
3.2.25 CKP Register: Communication Rate Selection
NOTE:
3.2.26 NSTDIF Register: NST Phase Difference
Supplement:
SMSC TMC2072
To change these bits, be sure to set TXEN to 0 (off-line) beforehand. If these bits change during the on-
line state, it executes a software reset automatically (the software reset is released automatically).
CKP (bits 2 to 0)
These bits specify the communication rate of the CircLink. When INIMODE of the mode register is set to 1,
the value set in this register is selected as the communication rate. When INIMODE is set to 0, values in
CKP2-0 of the external input pin become readable. Refer to section 1.5.15 - Prescaler Setup for
Communication Speed.
To change these bits, be sure to set TXEN to 0 (off-line) beforehand. If these bits change during the on-
line state, it executes a software reset automatically (the software reset is released automatically).
DIFDIR (NSTDIF register: bit 15)
This bit indicates a direction of NST phase difference. This bit is not applicable for the clock master node.
0: Ahead of CM node
1: Behind CM node
NSTDIF14-0 (NSTDIF register: bit 14-0)
These bits are used to express the absolute value of the phase difference between a CM node and NST in
0 to 32, 768. These bits are not applicable if the node is a clock master node.
Accessing the NST register can dynamically provide the latest time data. Since NST is a 16 bit value, it is
necessary to read the even address side (32h) first when an 8-bit bus is used. When the even address
side (13h) is read out, remaining 8 bits of the NST are latched internally
CKP
NSTDIF
If the node is a clock master node, the NSTDIF register is tied to 0000h.
15-5
14-0
2-0
Bit
15
bit
Name
name
--------
CKP2-0
DIFDIR
NSTDIF14-0
DATASHEET
init. value
init. value
0,0,0
all”0”
--
1
Page 89
Description
reserved (all "0")
Clock Prescaler Bits 2,1,0
description
Differential Direction
NST Differential
address: 30h
address: 32h
(Read/Write)
Revision 0.1 (06-07-07)
(Read Only)