SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 158

• Manufacturer Part Number: SAA7115HLBE
• Description: Video ICs ADV DGTL VIDEO DECODR
• Manufacturer: NXP Semiconductors

Specifications of SAA7115HLBE

• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-407
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Resolution: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SAA7115HL/V1,557 SAF7115HLBE

PNX1300/01/02/11 Data Book
Figure 10-2. Serial format of a IEC958 block
transmitted LSB first or MSB first in 32-clock cycle inter-
vals of the SPDO clock, a programmable clock generat-
ed by the SPDO Direct Digital Synthesizer.
10.4
Figure 10-2
block. A block starts with a special ‘B’ pre-amble, and
consists of 192 frames. The sample-rate of all embedded
audio data is equal to the frame rate. Each frame con-
sists of 2 sub-frames. Sub-frame 1 always starts with a
‘M’ pre-amble, except for sub-frame 1 in frame 0, which
starts with a ‘B’. Sub-frame 2 always starts with a ‘W’ pre-
amble.
When IEC-958 data carries 2-channel PCM data, one
audio sample is transmitted in each sub-frame, ‘left’ in
sub-frame 1 and ‘right’ in sub-frame 2. Each sample can
be 16 or 24 bits in length, where the MSB is always
aligned with bit slot 28 of the sub-frame. In case of more
than 20 bits/sample, the Aux field is used for the 4 LSBs.
When IEC-958 data carries non-PCM audio, such as 1 or
more streams of Dolby AC-3 encoded data and/or MPEG
audio, each sub-frame carries 16-bit data. The data of
successive frames adds up to a payload data-stream
which carries its own burst-data.This is described in [2].
Programmers should refer to the IEC-958 documents [1]
and Project 1937 document [2] for a precise description
of the required values in each field for different types of
10-2
M
IEC-958 SERIAL FORMAT
sub-frame 1
shows the serial format layout of a IEC-958
frame 191
W
PRELIMINARY SPECIFICATION
sub-frame 2
B, W or M
pre-amble
B, W or M
pre-amble
0
0
B
sub-frame
sub-frame 1
4
4
Aux.
frame 0
unused (0)
Start of block (indicated by unique B pre-amble)
W
S
B
L
8
8
sub-frame
sub-frame 2
consumer equipment. A complete discussion of this is-
sue is outside the scope of this document.
The SPDO block hardware only concerns itself with gen-
erating B, W and M preambles as well as generating the
P (parity) bit. All other bits in the sub-frame are complete-
ly determined by software and copied verbatim from
memory to output, subject only to bit-cell coding.
The programmer must construct valid IEC-958 blocks by
constructing the right sequence of 32-bit words as de-
scribed in
10.5
Each data bit in IEC-958 is transmitted using bi-phase
mark encoding. In bi-phase mark encoding, each data bit
is transmitted as a cell consisting of two consecutive bi-
nary states. The first state of a cell is always inverted
from the second state of the previous cell. The second
state of a cell is identical to the first state if the data bit
value is a “0”, and inverted if the data bit value is a “1”.
Pre-ambles are coded as bi-phase mark violations,
where the first state of a cell is not the inverse of the last
state of the previous cell.
The duration of each state in a cell is called a UI (Unit In-
terval), so that each cell is 2 UI’s long. In SPDO, the
length of a UI is 1 SPDO clock cycle as determined by
sub-frame (non-PCM audio)
sub-frame (2 channel PCM)
S
B
12
12
L
IEC-958 BIT CELL AND PRE-AMBLE
Section 10.7, “IEC-958 Memory Data Format.”
M
sub-frame 1
16
16
Sample data
16-bit data
Channel status
Channel status
frame 1
20
20
Validity flag
Validity flag
Philips Semiconductors
User data
User data
W
Parity bit
Parity bit
sub-frame 2
24
24
M
M
S
B
S
B
M
28
V U C P
28
V U C P
sub-fram
31
31