SAA7115HLBE NXP Semiconductors, SAA7115HLBE Datasheet - Page 447
![Video ICs ADV DGTL VIDEO DECODR](/photos/27/77/277797/qfp100_sml.jpg)
SAA7115HLBE
Manufacturer Part Number
SAA7115HLBE
Description
Video ICs ADV DGTL VIDEO DECODR
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7115HLBE.pdf
(548 pages)
Specifications of SAA7115HLBE
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 70 C
Package / Case
SOT-407
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
2
Resolution
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SAA7115HL/V1,557 SAF7115HLBE
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PNX1300/01/02/11 Data Book
quadavg
SYNTAX
FUNCTION
DESCRIPTION
bytes of rsrc1 and rsrc2. All bytes are considered unsigned. The least-significant 8 bits of each average is written to
the corresponding byte in rdest. No overflow or underflow detection is performed.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
A-149
r30 = 0x0201000e, r40 = 0xffffff02
r10 = 0, r60 = 0x9c9c6464, r70 = 0x649c649c
r20 = 1, r60 = 0x9c9c6464, r70 = 0x649c649c
As shown below, the
The
[ IF rguard ] quadavg rsrc1 rsrc2 → rdest
if rguard then {
}
rsrc1
temp ← (zero_ext8to32(rsrc1<7:0>) + zero_ext8to32(rsrc2<7:0>) + 1) / 2
rdest<7:0> ← temp<7:0>
temp ← (zero_ext8to32(rsrc1<15:8>) + zero_ext8to32(rsrc2<15:8>) + 1) / 2
rdest<15:8> ← temp<7:0>
temp ← (zero_ext8to32(rsrc1<23:16>) + zero_ext8to32(rsrc2<23:16>) + 1) / 2
rdest<23:16> ← temp<7:0>
temp ← (zero_ext8to32(rsrc1<31:24>) + zero_ext8to32(rsrc2<31:24>) + 1) / 2
rdest<31:24> ← temp<7:0>
quadavg
31
unsigned
Four full-precision
Initial Values
23
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
9-bit sums
unsigned
quadavg
PRELIMINARY SPECIFICATION
15
8
unsigned
unsigned
rdest
operation computes four separate averages of the four pairs of corresponding 8-bit
31
unsigned
7
0
unsigned
quadavg r30 r40 → r50
IF r10 quadavg r60 r70 → r80
IF r20 quadavg r60 r70 → r90
8
unsigned
23
unsigned
0
0
15
Operation
8
unsigned
rsrc2
Unsigned byte-wise quad average
unsigned
31
unsigned
+
7
0
unsigned
1
8
23
unsigned
unsigned
0
+
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
iavgonep dspuquadaddui
1
r50 ← 0x81808008
no change, since guard is false
r90 ← 0x809c6480
0
Philips Semiconductors
15
unsigned
ATTRIBUTES
+
SEE ALSO
ifir8ii
1
Result
7
unsigned
+
dspalu
1, 3
1
No
73
—
0
2
2
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