HUFA76619D3ST Fairchild Semiconductor, HUFA76619D3ST Datasheet - Page 7

• Manufacturer Part Number: HUFA76619D3ST
• Description: MOSFET N-CH 100V 18A DPAK
• Manufacturer: Fairchild Semiconductor
• Series: UltraFET™r

Specifications of HUFA76619D3ST

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 85 mOhm @ 18A, 10V
• Drain To Source Voltage (vdss): 100V
• Current - Continuous Drain (id) @ 25° C: 18A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 29nC @ 10V
• Input Capacitance (ciss) @ Vds: 767pF @ 25V
• Power - Max: 75W
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (2 leads+tab), SC-63
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PSPICE Electrical Model
.SUBCKT HUFA76619 2 1 3 ;
CA 12 8 1.3e-9
CB 15 14 1.4e-9
CIN 6 8 7.5e-10
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 117.5
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1.0e-9
LGATE 1 9 1.73e-10
LSOURCE 3 7 6.12e-10
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 3.95e-2
RGATE 9 20 2.95
RLDRAIN 2 5 10
RLGATE 1 9 1.7
RLSOURCE 3 7 6.1
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 23e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*35),3.7))}
.MODEL DBODYMOD D (IS = 5.9e-13 RS = 1.3e-2 TRS1 = 1e-5 TRS2 = 0 CJO = 9.0e-10 TT = 1e-7 M = 0.65)
.MODEL DBREAKMOD D (RS = 5.8e- 1TRS1 = 1e- 3TRS2 = 2e-5)
.MODEL DPLCAPMOD D (CJO = 9e-1 0IS = 1e-3 0N = 10 M = 0.9)
.MODEL MMEDMOD NMOS (VTO = 1.85KP = 4 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 2.95)
.MODEL MSTROMOD NMOS (VTO = 2.22 KP = 50 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 1.60 KP = 0.05 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 29.5 RS = 0.1)
.MODEL RBREAKMOD RES (TC1 = 1.05e- 3TC2 = -5e-7)
.MODEL RDRAINMOD RES (TC1 = 11.5e-3 TC2 = 2.6e-5)
.MODEL RSLCMOD RES (TC1 = 3e-3TC2 = 1.0e-6)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6)
.MODEL RVTHRESMOD RES (TC1 = -1.8e-3 TC2 = -6.5e-6)
.MODEL RVTEMPMOD RES (TC1 = -1.5e- 3TC2 = 1e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.5 VOFF= -2.0)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.0 VOFF= -4.5)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.3 VOFF= 0.2)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.2 VOFF= -0.3)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
©2002 Fairchild Semiconductor Corporation
GATE
1
rev 28August 1999
RLGATE
LGATE
9
RGATE
CA
12
20
+
EVTEMP
S1A
S1B
ESG
18
22
EGS
13
8
+
-
-
13
6
8
10
+
+
-
-
14
13
6
8
6
RSLC2
S2A
S2B
DPLCAP
EVTHRES
+
EDS
19
8
15
CB
CIN
-
+
-
5
8
51
5
5
MSTRO
+
-
14
51
21
RDRAIN
RSLC1
50
ESLC
16
8
MMED
8
EBREAK
IT
DBREAK
RSOURCE
17
MWEAK
RVTHRES
RBREAK
11
+
-
17
18
HUFA76619D3, HUFA76619D3S Rev. B
7
+
-
18
22
RVTEMP
19
RLSOURCE
DBODY
LSOURCE
VBAT
RLDRAIN
LDRAIN
SOURCE
DRAIN
2
3