HC230F1020 Altera, HC230F1020 Datasheet - Page 173

• Manufacturer Part Number: HC230F1020
• Manufacturer: Altera

Specifications of HC230F1020

• Lead Free Status / RoHS Status: Not Compliant

Figure 7–2. TimeQuest Timing-Related Settings in the HardCopy II Advisor
Altera Corporation
September 2008
The TimeQuest timing analyzer provides a number of timing checks
during the HardCopy II design flow. The HardCopy II Advisor guides
you to launch the TimeQuest timing analyzer for these timing checks and
ensures that the design is fully constrained, as shown in
All timing paths must be fully constrained. The TimeQuest report_ucp
command (or the TimeQuest GUI Tasks pane option Report
Unconstrained Paths) generates a series of reports that detail all
unconstrained paths in your design. These reports list unconstrained
setup, hold, recovery, and removal timing paths in the design. You must
correct any design errors the report shows you by applying additional
constraints before running static timing analysis.
The TimeQuest timing analyzer supports most constraints in the SDC
format for the HardCopy series of devices. The TimeQuest timing
analyzer constraints are specified in commands from two Tcl packages in
the Quartus II software. These packages are the sdc package and the
sdc_ext package. The HardCopy II design flow requires that all timing
constraints be specified in commands from the SDC Version 1.5
HardCopy II Timing Closure Methodology
Figure
7–2.
7–9