HC230F1020 Altera, HC230F1020 Datasheet - Page 207

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HC230F1020

Manufacturer Part Number
HC230F1020
Description
Manufacturer
Altera
Datasheet

Specifications of HC230F1020

Lead Free Status / RoHS Status
Not Compliant

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Altera Corporation
September 2008
Notes to
(1)
(2)
(3)
3.3-V LVTTL
3.3-V LVCMOS
2.5-V LVTTL
2.5-V LVCMOS
1.8-V LVTTL
1.8-V LVCMOS
1.5-V LVTTL
1.5-V LVCMOS
2.5-V SSTL class I
2.5-V SSTL class II
1.8-V SSTL class I
1.8-V SSTL class II
1.8-V HSTL class I
1.8-V HSTL class II
1.5-V HSTL class I
Table 8–13. HC210 and HC220 Selectable I/O Drivers with On-Chip Series Termination without Calibration
Note (1)
All these numbers are preliminary and pending silicon characterization.
HardCopy II HC210 and HC220 devices do not support on-chip series termination with this I/O standard on these
pins.
Support pending HardCopy II characterization.
I/O Standard
Table
8–13:
Top Column I/O
Table 8–13
support on-chip series termination without calibration.
On-Chip Series Termination with Calibration
Stratix II devices support on-chip series termination with calibration in
column I/O pins in the top and bottom banks. HC230 and HC240 devices
also support on-chip series termination with calibration in column I/O
pins in the top and bottom banks, but HC220 and HC210 devices only
support this feature on the top I/O banks.
standards on the HardCopy II devices that support calibrated-series
termination.
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
50 Ω
25 Ω
50 Ω
25 Ω
50 Ω
25 Ω
Pins
(3)
(3)
(3)
lists the HardCopy II HC210 and HC220 output standards that
Bottom Column I/O
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
50 Ω
50 Ω
Pins
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Left Row I/O Pins Right Row I/O Pins
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
50 Ω
50 Ω
Table 8–14
(2)
(2)
(2)
(2)
On-Chip Termination
lists available I/O
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
25 or 50 Ω
50 Ω
50 Ω
Preliminary
(2)
(2)
(2)
(2)
8–19

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