HC230F1020 Altera, HC230F1020 Datasheet - Page 203

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HC230F1020

Manufacturer Part Number
HC230F1020
Description
Manufacturer
Altera
Datasheet

Specifications of HC230F1020

Lead Free Status / RoHS Status
Not Compliant

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Altera Corporation
September 2008
Programmable Drive Strength Support
The maximum current strength setting is the default setting in the
Quartus II software and achieves maximum I/O performance. Stratix II
device output buffers for each I/O pin have a programmable drive
strength control for certain I/O standards.
HardCopy II support for these settings differs from that found in Stratix II
devices. For compatibility with HardCopy II HC210 and HC220 devices,
you must restrict the I/O drive settings of Stratix II companion devices,
as shown in
Notes to
(1)
(2)
(3)
EP2S60
HC220
EP2S90
HC220
EP2S130
HC220
EP2S90
HC230
EP2S130
HC230
EP2S180
HC230
EP2S180
HC240
EP2S180
HC240
Companion Devices
Table 8–9. Differential Channels with Stratix II and HardCopy II Companion
Devices (Part 2 of 2)
Stratix II and
HardCopy II
Pin count does not include dedicated PLL input and output pins.
The total number of receiver channels for HC210, HC220, and HC230 devices
include two non-dedicated clock channels that can optionally be used as data
channels.
The total number of receiver channels for HC240 devices include four
non-dedicated clock channels that can optionally be used as data channels.
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(3)
Table
Table
8–9:
8–10.
672-pin FineLine BGA
780-pin FineLine BGA
780-pin FineLine BGA
1,020-pin FineLine BGA
1,020-pin FineLine BGA
1,020-pin FineLine BGA
1,020-pin FineLine BGA
1,508-pin FineLine BGA
Note (1)
Package
External Memory Interface Support
Transmitters
116
29
29
29
44
44
44
88
Receivers
Preliminary
116
31
31
31
46
46
46
92
8–15

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