HC230F1020 Altera, HC230F1020 Datasheet - Page 3

no-image

HC230F1020

Manufacturer Part Number
HC230F1020
Description
Manufacturer
Altera
Datasheet

Specifications of HC230F1020

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HC230F1020
Manufacturer:
ALTERA
0
Part Number:
HC230F1020AJ
Manufacturer:
ALTERA
0
Part Number:
HC230F1020ANQ
Manufacturer:
Discera
Quantity:
2 000
Part Number:
HC230F1020AW
Manufacturer:
ALTERA
0
Part Number:
HC230F1020BA
Manufacturer:
ALTERA
0
Part Number:
HC230F1020BL
Manufacturer:
ALTERA
0
Introduction
Feature
Overview
Altera Corporation
September 2008
H51015-2.6
HardCopy
with pin-outs, densities, and architecture that complement Stratix
devices. HardCopy II device features, such as phase-locked loops (PLLs),
memory, and I/O elements (IOEs), are functionally and electrically
equivalent to the Stratix II FPGA features. The combination of Stratix II
FPGAs for in-system prototype and design verification, HardCopy II
devices for high-volume production, and the Quartus
design, provide a complete, low-risk design solution.
HardCopy II devices improve on the successful and proven methodology
of the two previous generations of HardCopy series devices. Altera
HardCopy II devices use the same base arrays across multiple designs for
a given device density and are customized using only two metal layers.
HardCopy II devices offer up to 90% cost reduction compared to Stratix II
FPGA prototypes.
The Quartus II software provides a complete set of tools, common for
both designing Stratix II FPGA prototypes and for quickly migrating the
design to a HardCopy II companion device. HardCopy II devices are also
supported through other front-end design tools from Synopsys,
Synplicity, and Mentor Graphics
HardCopy II structured ASICs are manufactured on a 1.2 V, 90 nm
all-layer-copper metal fabrication process (up to nine layers of metal).
HardCopy II devices offer the following features:
Fine-grained HCell architecture resulting in a low-cost,
high-performance, low-power structured ASIC
Customized using only two metal layers for fast turn-around times
and low non-recurring expenses (NRE)
Fully tested prototypes are available in approximately 10 to 12 weeks
from the date of your design submission
Support for instant-on or instant-on-after-50-ms power-up modes
Preserves the design functionality of a Stratix II FPGA prototype
1,000,000 to 3,600,000 usable gates for both logic and DSP functions
®
II devices are low-cost, high-performance structured ASICs
1. Introduction to HardCopy II
®
.
®
II software for
Devices
Preliminary
®
II
®
1–1

Related parts for HC230F1020