72T7285L4-4BBG Integrated Device Technology (Idt), 72T7285L4-4BBG Datasheet - Page 10

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72T7285L4-4BBG

Manufacturer Part Number
72T7285L4-4BBG
Description
FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 72 324-Pin BGA
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 72T7285L4-4BBG

Package
324BGA
Configuration
Dual
Bus Directional
Uni-Directional
Density
1.125 Mb
Organization
16Kx72
Data Bus Width
72 Bit
Timing Type
Synchronous
Expansion Type
Depth|Width
Typical Operating Supply Voltage
2.5 V
Operating Temperature
0 to 70 °C
AC ELECTRICAL CHARACTERISTICS
(Commercial: V
NOTES:
1. All AC timings apply to both Standard IDT mode and First Word Fall Through mode.
2. Pulse widths less than minimum values are not allowed.
3. Values guaranteed by design, not currently tested.
4. Industrial temperature range product for the 5ns speed grade is available as a standard device. All other speed grades are available by special order.
IDT72T7285/72T7295/72T72105/72T72115 2.5V TeraSync™ ™ ™ ™ ™ 72-BIT FIFO
16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
C
A
CLK
CLKH
DS
DH
ENH
LDS
LDH
WCSH
S
SCKH
SDH
SENH
RS
HRSS
RSR
CLKL
ENS
WCSS
SCLK
SCKL
SDS
SENS
RSS
RSF
WFF
REF
PAFS
PAES
ERCLK
CLKEN
RCSLZ
RCSHZ
SKEW1
SKEW2
Clock Cycle Frequency (Synchronous)
Data Access Time
Clock Cycle Time
Clock High Time
Clock Low Time
Data Setup Time
Data Hold Time
Enable Setup Time
Enable Hold Time
Load Setup Time
Load Hold Time
WCS setup time
WCS hold time
Clock Cycle Frequency (SCLK)
Serial Clock Cycle
Serial Clock High
Serial Clock Low
Serial Data In Setup
Serial Data In Hold
Serial Enable Setup
Serial Enable Hold
Reset Pulse Width
Reset Setup Time
HSTL Reset Setup Time
Reset Recovery Time
Reset to Flag and Output Time
Write Clock to FF or IR
Read Clock to EF or OR
Write Clock to Synchronous Programmable Almost-Full Flag
Read Clock to Synchronous Programmable Almost-Empty Flag
RCLK to Echo RCLK output
RCLK to Echo REN output
RCLK to Active from High-Z
RCLK to High-Z
Skew time between RCLK and WCLK for EF/OR and FF/IR
Skew time between RCLK and WCLK for PAE and PAF
CC
= 2.5V ± 5%, T
(3)
(2)
Parameter
A
= 0°C to +70°C;Industrial: V
(3)
CC
= 2.5V ± 5%, T
IDT72T72105L4-4
IDT72T72115L4-4
(1)
IDT72T7285L4-4
IDT72T7295L4-4
Min.
4.44
Commercial
100
0.6
2.0
2.0
1.2
0.5
1.2
0.5
1.2
0.5
1.2
0.5
3.5
45
45
15
30
15
10
5
5
5
4
4
— SYNCHRONOUS TIMING
10
Max.
225
3.4
3.4
3.4
3.4
3.4
3.8
3.4
3.4
3.4
10
10
A
= -40°C to +85°C)
IDT72T72105L5
IDT72T72115L5
IDT72T7285L5
IDT72T7295L5
Com’l & Ind’l
Min.
100
0.6
2.3
2.3
1.5
0.5
1.5
0.5
1.5
0.5
1.5
0.5
45
45
15
30
15
10
5
5
5
5
4
4
5
Max.
200
3.6
3.6
3.6
3.6
3.6
3.6
3.6
3.6
10
12
4
IDT72T72105L6-7 IDT72T72105L10
IDT72T72115L6-7 IDT72T72115L10
IDT72T7285L6-7
IDT72T7295L6-7
100
0.6
6.7
2.8
2.8
2.0
0.5
2.0
0.5
2.0
0.5
2.0
0.5
Min.
45
45
15
30
15
10
5
5
5
4
5
6
COMMERCIAL AND INDUSTRIAL
Max.
Commercial
150
3.8
3.8
3.8
3.8
3.8
4.3
3.8
3.8
3.8
10
15
TEMPERATURE RANGES
IDT72T7285L10
IDT72T7295L10
100
Min.
0.6
4.5
4.5
3.0
0.5
3.0
0.5
3.0
0.5
3.0
0.5
10
45
45
15
30
15
10
5
5
5
4
7
8
100
Max.
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
10
15
5
MHz
MHz
Unit
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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