72T7285L4-4BBG Integrated Device Technology (Idt), 72T7285L4-4BBG Datasheet - Page 17

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72T7285L4-4BBG

Manufacturer Part Number
72T7285L4-4BBG
Description
FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 72 324-Pin BGA
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 72T7285L4-4BBG

Package
324BGA
Configuration
Dual
Bus Directional
Uni-Directional
Density
1.125 Mb
Organization
16Kx72
Data Bus Width
72 Bit
Timing Type
Synchronous
Expansion Type
Depth|Width
Typical Operating Supply Voltage
2.5 V
Operating Temperature
0 to 70 °C
NOTES:
1. The programming method can only be selected at Master Reset.
2. Parallel reading of the offset registers is always permitted regardless of which programming method has been selected.
3. The programming sequence applies to both IDT Standard and FWFT modes.
16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72
LD
0
0
0
X
1
1
1
WEN
1
1
0
X
1
0
1
REN
Figure 3. Programmable Flag Offset Programming Sequence
0
1
1
1
X
0
1
SEN
1
1
0
1
X
X
X
WCLK
X
X
X
X
X
RCLK
17
X
X
X
X
X
SCLK
X
X
X
X
X
X
Serial shift into registers:
1 bit for each rising SCLK edge
Parallel read from registers:
Empty Offset (LSB)
Empty Offset (MSB)
Full Offset (LSB)
Full Offset (MSB)
Starting with Empty Offset (LSB)
Ending with Full Offset (MSB)
Parallel write to registers:
Empty Offset (LSB)
Empty Offset (MSB)
Full Offset (LSB)
Full Offset (MSB)
28 bits for the IDT72T7285
30 bits for the IDT72T7295
32 bits for the IDT72T72105
34 bits for the IDT72T72115
IDT72T7285
IDT72T7295
IDT72T72105
IDT72T72115
Read Memory
No Operation
Write Memory
No Operation
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
5994 drw06

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