72T7285L4-4BBG Integrated Device Technology (Idt), 72T7285L4-4BBG Datasheet - Page 28

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72T7285L4-4BBG

Manufacturer Part Number
72T7285L4-4BBG
Description
FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 72 324-Pin BGA
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 72T7285L4-4BBG

Package
324BGA
Configuration
Dual
Bus Directional
Uni-Directional
Density
1.125 Mb
Organization
16Kx72
Data Bus Width
72 Bit
Timing Type
Synchronous
Expansion Type
Depth|Width
Typical Operating Supply Voltage
2.5 V
Operating Temperature
0 to 70 °C
JTAG TIMING SPECIFICATION
SYSTEM INTERFACE PARAMETERS
NOTE:
1. 50pf loading on external output signals.
IDT72T7285/72T7295/72T72105/72T72115 2.5V TeraSync™ ™ ™ ™ ™ 72-BIT FIFO
16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72
Data Output Hold
Data Output
TRST
Parameter
Data Input
TDI/
TMS
TDO
TCK
Symbol Test Conditions
t
t
DOH
DO
t
t
DS
DH
t
3
(1)
(1)
t
5
t
t
rise=3ns
fall=3ns
t
1
t
6
t
DS
t
4
t
TCK
Min.
10
10
0
-
t
IDT72T72105
IDT72T72115
DH
IDT72T7285
IDT72T7295
Figure 6. Standard JTAG Timing
Notes to diagram:
t1 = t
t2 = t
t3 = t
t4 = t
t5 = tRST
t6 = tRSR (reset recovery)
Max. Units
t
2
20
-
-
-
TCKRISE
TCKLOW
TCKHIGH
TCKFALL
ns
ns
ns
(reset pulse width)
28
JTAG
AC ELECTRICAL CHARACTERISTICS
NOTE:
1. Guaranteed by design.
(v
JTAG Clock Input Period t
JTAG Clock HIGH
JTAG Clock Low
JTAG Clock Rise Time
JTAG Clock Fall Time
JTAG Reset
JTAG Reset Recovery
cc = 2.5V
Parameter
±
5%; Tcase = 0°C to +85°C)
Symbol
t
t
t
t
t
t
TCK
TCKHIGH
TCKLOW
TCKRISE
TCKFALL
RST
RSR
COMMERCIAL AND INDUSTRIAL
Conditions
t
DO
Test
TEMPERATURE RANGES
-
-
-
-
-
-
-
Min. Max. Units
100
40
40
50
50
-
-
TDO
5
5
-
-
-
-
-
(1)
(1)
5994 drw11
ns
ns
ns
ns
ns
ns
ns

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