SLXT973QC.A2 Intel, SLXT973QC.A2 Datasheet - Page 32



Manufacturer Part Number

Specifications of SLXT973QC.A2

Lead Free Status / RoHS Status
Not Compliant
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
Base Page Exchange
By exchanging Base Pages, the LXT973 and its link partner communicate their capabilities to each
other. Both sides must receive at least three identical base pages for negotiation to proceed. Each
side finds their highest common capabilities, exchange more pages, and agree on the operating
state of the line.
Next Page Exchange
Additional information, exceeding that required by Base Page exchange, can also be sent via “Next
Pages.” The LXT973 fully supports the IEEE 802.3 method of negotiation via Next Page
exchange. The Next Page exchange uses Register 7 to send information and Register 8 to receive
information, and occurs only if both ends of the link advertise their ability to exchange Next Pages.
The LXT973 is configured to make Next Page exchange easier for software. When a Base Page or
Next Page is received, the Page Received Register bit 6.1 remains set until read. When Register bit
6.2 (Next Page Able) is received, it stays set until read. This bit should be cleared whenever a new
negotiation occurs. This prevents the user from reading an old value in Register 6 and assuming
there is valid information in Registers 5 and 8. Additionally, Register 6 contains a new bit (Register
bit 6.5) that indicates when the current Received Page is the Base Page. This information is useful
for recognizing when next pages must be re-sent due to the start of a new negotiation process.
Register bit 16.1 and the Page Received bit (Register bit 6.1) are also cleared upon reading Register
Controlling Auto-Negotiation
When auto-negotiation is controlled by software, the following steps are recommended:
Link Criteria
In 100 Mbps mode, link is established when the scrambler becomes locked and remains locked for
approximately 50 ms. Link remains up unless the de-scrambler receives less than 12 consecutive
IDLE symbols in any 2 ms period. This provides a very robust operation, filtering out any small
noise hits that may disrupt the link.
In 10 Mbps mode, link is established based on the link state machine found in the IEEE 802.3,
Clause 14.X specification. Receiving 100 Mbps idle patterns does not bring up a 10 Mbps link.
Parallel Detection
In parallel with auto-negotiation, the LXT973 also monitors for 10 Mbps Normal Link Pulses
(NLP) or 100 Mbps IDLE symbols. If either is detected, the device automatically reverts to the
corresponding operating mode. Parallel detection allows the LXT973 to communicate with devices
that do not support auto-negotiation. The established link is always set at half-duplex.
1. After power-up, power-down, or reset, the power-down recovery time (max = 300 s) must be
2. Set the auto-negotiation advertisement register bits.
3. Enable auto-negotiation (set MDIO Register bit 0.12 = 1).
exhausted before proceeding.
Rev. Date: March 1, 2002
Document #: 249426
Revision #: 002

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