PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 129

• Manufacturer Part Number: PIC16F1937-E/MV
• Description: 14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1937-E/MV

• Processor Series: PIC16F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 14 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-40
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

12.0
Depending on the device selected and peripherals
enabled, there are up to five ports available. In general,
when a peripheral is enabled on a port pin, that pin
cannot be used as a general purpose output. However,
the pin can still be read.
Each port has three standard registers for its operation.
These registers are:
• TRISx registers (data direction)
• PORTx registers (reads the levels on the pins of
• LATx registers (output latch)
Some ports may have one or more of the following
additional registers. These registers are:
• ANSELx (analog select)
• WPUx (weak pull-up)
• INLVLx (input level control)
TABLE 12-1:
The Data Latch (LATx registers) is useful for
read-modify-write operations on the value that the I/O
pins are driving.
A write operation to the LATx register has the same
effect as a write to the corresponding PORTx register.
A read of the LATx register reads of the values held in
the I/O PORT latches, while a read of the PORTx
register reads the actual I/O pin value.
Ports that support analog inputs have an associated
ANSELx register. When an ANSEL bit is set, the digital
input buffer associated with that bit is disabled.
Disabling the input buffer prevents analog signal levels
on the pin between a logic high and low from causing
excessive current in the logic input circuitry. A
simplified model of a generic I/O port, without the
interfaces to other peripherals, is shown in
 2008-2011 Microchip Technology Inc.
Device
PIC16(L)F1934
PIC16(L)F1936
PIC16(L)F1937
the device)
I/O PORTS
PORT AVAILABILITY PER
DEVICE
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Figure
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12-1.
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FIGURE 12-1:
EXAMPLE 12-1:
; This code example illustrates
; initializing the PORTA register. The
; other ports are initialized in the same
; manner.
BANKSEL PORTA
CLRF
BANKSEL LATA
CLRF
BANKSEL ANSELA
CLRF
BANKSEL TRISA
MOVLW
MOVWF
To peripherals
Write PORTx
Write LATx
Data Bus
Read PORTx
PIC16(L)F1934/6/7
PORTA
LATA
ANSELA
B'00111000' ;Set RA<5:3> as inputs
TRISA
Data Register
D
CK
Read LATx
ANSELx
GENERIC I/O PORT
OPERATION
INITIALIZING PORTA
Q
;
;Init PORTA
;Data Latch
;
;
;digital I/O
;
;and set RA<2:0> as
;outputs
TRISx
DS41364E-page 129
V
V
DD
SS
I/O pin