PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 219

14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE

PIC16F1937-E/MV

Manufacturer Part Number
PIC16F1937-E/MV
Description
14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F1937-E/MV

Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
23.3.7
In Sleep mode, the TMRx register will not increment
and the state of the module will not change. If the CCPx
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMRx will continue from its
previous state.
23.3.8
The PWM frequency is derived from the system clock
frequency. Any changes in the system clock frequency
will result in changes to the PWM frequency. See
Section 5.0 “Oscillator Module (With Fail-Safe
Clock Monitor)”
23.3.9
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
TABLE 23-8:
 2008-2011 Microchip Technology Inc.
APFCON
CCPxCON
CCPTMRS0
CCPTMRS1
INTCON
PIE1
PIE2
PIE3
PIR1
PIR2
PIR3
PRx
TxCON
TMRx
TRISA
TRISB
TRISC
TRISD
TRISE
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
Note 1:
Name
(2)
2:
3:
*
Applies to ECCP modules only.
These registers/bits are not implemented on PIC16(L)F1936 devices, read as ‘0’.
Unimplemented, read as ‘1’.
Page provides register information.
OPERATION IN SLEEP MODE
CHANGES IN SYSTEM CLOCK
FREQUENCY
EFFECTS OF RESET
Timer2/4/6 Period Register
Timer2/4/6 Module Register
TMR1GIE
TMR1GIF
TRISA7
TRISB7
TRISC7
TRISD7
OSFIE
OSFIF
Bit 7
GIE
for additional details.
SUMMARY OF REGISTERS ASSOCIATED WITH STANDARD PWM
C4TSEL<1:0>
PxM<1:0>
CCP3SEL
CCP5IE
CCP5IF
TRISA6
TRISB6
TRISC6
TRISD6
(1)
PEIE
ADIE
ADIF
Bit 6
C2IE
C2IF
T1GSEL
TMR0IE
CCP4IE
CCP4IF
TRISC5
TRISD5
TRISA5
TRISB5
RCIE
RCIF
Bit 5
C1IE
C1IF
TxOUTPS<3:0>
C3TSEL<1:0>
DCxB<1:0>
P2BSEL
CCP3IE
CCP3IF
TRISA4
TRISB4
TRISC4
TRISD4
INTE
TXIE
EEIE
EEIF
Bit 4
TXIF
SRNQSEL C2OUTSEL
TMR6IE
TMR6IF
TRISA3
TRISB3
TRISC3
TRISD3
SSPIE
BCLIE
SSPIF
IOCIE
BCLIF
23.3.10
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
register, APFCON. To determine which pins can be
moved and what their default locations are upon a
Reset, see
more information.
Bit 3
C2TSEL<1:0>
(3)
PIC16(L)F1934/6/7
TRISE2
TMRxON
TMR0IF
CCP1IE
CCP1IF
TRISA2
TRISB2
TRISC2
TRISD2
LCDIE
Section 12.1 “Alternate Pin Function”
LCDIF
ALTERNATE PIN LOCATIONS
Bit 2
CCPxM<3:0>
(2)
TRISE1
TMR2IE
TMR4IE
TMR2IF
TMR4IF
TRISC1
TRISD1
TRISA1
TRISB1
SSSEL
INTF
Bit 1
TxCKPS<:0>1
C1TSEL<1:0>
C5TSEL<1:0>
(2)
CCP2SEL
TRISE0
TMR1IE
CCP2IE
TMR1IF
CCP2IF
TRISA0
TRISB0
TRISC0
TRISD0
IOCIF
Bit 0
DS41364E-page 219
(2)
Register
on Page
207*
131
234
235
235
100
101
102
103
104
209
207
133
138
142
145
148
98
99
for

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