PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 223

14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE

PIC16F1937-E/MV

Manufacturer Part Number
PIC16F1937-E/MV
Description
14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F1937-E/MV

Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
23.4.1
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the CCPx/PxA pin, while the complementary PWM
output signal is output on the PxB pin (see
Figure
applications, as shown in
applications, where four power switches are being
modulated with two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in
Half-Bridge power devices. The value of the PDC<6:0>
bits of the PWMxCON register sets the number of
instruction cycles before the output is driven active. If the
value is greater than the duty cycle, the corresponding
output remains inactive during the entire cycle. See
Section 23.4.5 “Programmable Dead-Band Delay
Mode”
operations.
FIGURE 23-9:
 2008-2011 Microchip Technology Inc.
Standard Half-Bridge Circuit (“Push-Pull”)
Half-Bridge Output Driving a Full-Bridge Circuit
23-9). This mode can be used for Half-Bridge
for more details of the dead-band delay
HALF-BRIDGE MODE
EXAMPLE OF HALF-BRIDGE APPLICATIONS
Figure
PxA
PxB
23-9, or for Full-Bridge
PxA
PxB
FET
Driver
FET
Driver
FET
Driver
FET
Driver
Since the PxA and PxB outputs are multiplexed with the
PORT data latches, the associated TRIS bits must be
cleared to configure PxA and PxB as outputs.
FIGURE 23-8:
PxA
PxB
td = Dead-Band Delay
Note 1: At this time, the TMRx register is equal to the
Load
V+
(2)
(2)
PIC16(L)F1934/6/7
2: Output signals are shown as active-high.
(1)
td
PRx register.
Pulse Width
Load
Period
td
FET
Driver
FET
Driver
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
+
-
+
-
(1)
DS41364E-page 223
Period
(1)

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