PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 24

• Manufacturer Part Number: PIC16F1937-E/MV
• Description: 14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1937-E/MV

• Processor Series: PIC16F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 14 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-40
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC16(L)F1934/6/7
FIGURE 2-1:
DS41364E-page 24
OSC2/CLKOUT
OSC1/CLKIN
15
Oscillator
Oscillator
Oscillator
Program
Program
Program
Internal
Internal
Internal
15
Block
Block
Block
Bus
Bus
Bus
CORE BLOCK DIAGRAM
15
Instruction Reg
Instruction reg
Instruction reg
Decode and
Configuration
Configuration
Configuration
Generation
Generation
Generation
Instruction
Instruction
Instruction
Decode &
Decode &
Program
Memory
14
14
14
Control
Control
Control
Timing
Timing
Timing
Flash
8
8
8
Direct Addr 7
Direct Addr 7
Direct Addr 7
15
Start-up Timer
Program Memory
Program Counter
Program Counter
Program Counter
V
V
V
16-Level Stack
Brown-out
8 Level Stack
8 Level Stack
Watchdog
Power-up
Power-on
Oscillator
DD
DD
DD
Read (PMR)
Reset
Reset
Timer
Timer
(13-bit)
(13-bit)
(15-bit)
V
V
V
SS
SS
SS
FSR1 Reg
FSR reg
FSR reg
8
8
8
3
3
3
12
Data Bus
Data Bus
Data Bus
Addr MUX
Addr MUX
Addr MUX
 2008-2011 Microchip Technology Inc.
ALU
ALU
ALU
W reg
RAM
Indirect
STATUS Reg
STATUS reg
STATUS reg
Addr
FSR reg
FSR reg
FSR0 Reg
9
MUX
MUX
MUX
RAM Addr
12
8
8
8