PIC16F1937-E/MV Microchip Technology, PIC16F1937-E/MV Datasheet - Page 341

14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE

PIC16F1937-E/MV

Manufacturer Part Number
PIC16F1937-E/MV
Description
14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F1937-E/MV

Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
27.4.4
The LCD contrast control circuit consists of a
seven-tap resistor ladder, controlled by the LCDCST
bits. Refer to
FIGURE 27-7:
27.4.5
Under firmware control, an internal reference for the
LCD bias voltages can be enabled. When enabled, the
source of this voltage can be either V
3 times the main fixed voltage reference (3.072V).
When no internal reference is selected, the LCD con-
trast control circuit is disabled and LCD bias must be
provided externally.
Whenever the LCD module is inactive (LCDA = 0), the
internal reference will be turned off.
When the internal reference is enabled and the Fixed
Voltage Reference is selected, the LCDIRI bit can be
used to minimize power consumption by tieing into the
LCD Reference Ladder Automatic Power mode switch-
ing. When LCDIRI = 1 and the LCD reference ladder is
in Power mode ‘B’, the LCD internal FVR buffer is
disabled.
.
 2008-2011 Microchip Technology Inc.
Note:
3.072V
From FVR
Buffer
Internal Reference
CONTRAST CONTROL
INTERNAL REFERENCE
The LCD module automatically turns on the
Fixed Voltage Reference when needed.
Figure
V
DDIO
27-7.
INTERNAL REFERENCE AND CONTRAST CONTROL BLOCK DIAGRAM
DDIO
or a voltage
R
Contrast control
R
7 Stages
The contrast control circuit is used to decrease the
output voltage of the signal source by a total of
approximately 10%, when LCDCST = 111.
Whenever the LCD module is inactive (LCDA = 0), the
contrast control ladder will be turned off (open).
27.4.6
The VLCD<3:1> pins provide the ability for an external
LCD bias network to be used instead of the internal lad-
der. Use of the VLCD<3:1> pins does not prevent use
of the internal ladder. Each VLCD pin has an indepen-
dent control in the LCDREF register
allowing access to any or all of the LCD Bias signals.
This architecture allows for maximum flexibility in differ-
ent applications
For example, the VLCD<3:1> pins may be used to add
capacitors to the internal reference ladder, increasing
the drive capacity.
For applications where the internal contrast control is
insufficient, the firmware can choose to only enable the
VLCD3 pin, allowing an external contrast control circuit
to use the internal reference divider.
R
PIC16(L)F1934/6/7
LCDCST<2:0>
VLCD<3:1> PINS
R
3
Analog
MUX
7
0
To top of
Reference Ladder
DS41364E-page 341
(Register
27-3),

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