PIC16LF1828-E/ML Microchip Technology, PIC16LF1828-E/ML Datasheet - Page 121

• Manufacturer Part Number: PIC16LF1828-E/ML
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core, Nan
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1828-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.0
Depending on the device selected and peripherals
enabled, there are up to two ports available. In general,
when a peripheral is enabled, that pin may not be used
as a general purpose I/O pin.
Each port has three registers for its operation. These
registers are:
• TRISx registers (data direction register)
• PORTx registers (reads the levels on the pins of
• LATx registers (output latch)
The Data Latch (LATx registers) is useful for
read-modify-write operations on the value that the I/O
pins are driving.
A write operation to the LATx register has the same
affect as a write to the corresponding PORTx register.
A read of the LATx register reads of the values held in
the I/O PORT latches, while a read of the PORTx
register reads the actual I/O pin value.
Ports with analog functions also have an ANSELx
register which can disable the digital input and save
power. A simplified model of a generic I/O port, without
the interfaces to other peripherals, is shown in
Figure
FIGURE 12-1:
 2010 Microchip Technology Inc.
To peripherals
Write LATx
Write PORTx
Data Bus
the device)
Read PORTx
12-1.
I/O PORTS
Data Register
D
CK
Read LATx
ANSELx
GENERIC I/O PORT
OPERATION
Q
TRISx
V
V
DD
SS
I/O pin
Preliminary
12.1
The Alternate Pin Function Control 0 (APFCON0) and
Alternate Pin Function Control 1 (APFCON1) registers
are used to steer specific peripheral input and output
functions between different pins. The APFCON0 and
APFCON1 registers are shown in
Register
functions can be moved between different pins.
• RX/DT/TX/CK
• SDO
• SS (Slave Select)
• T1G
• P1B/P1C/P1D/P2B
• CCP1/P1A/CCP2
These bits have no effect on the values of any TRIS
register. PORT and TRIS overrides will be routed to the
correct pin. The unselected pin will be unaffected.
PIC16(L)F1824/1828
Alternate Pin Function
12-2. For this device family, the following
DS41419B-page 121
Register 12-1
and