PIC16LF1828-E/ML Microchip Technology, PIC16LF1828-E/ML Datasheet - Page 130

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PIC16LF1828-E/ML

Manufacturer Part Number
PIC16LF1828-E/ML
Description
7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16LF1828-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16(L)F1824/1828
12.3
PORTB is a 4-bit wide, bidirectional port. The
corresponding
(Register
corresponding PORTB pin an input (i.e., put the
corresponding output driver in a High-Impedance mode).
Clearing a TRISB bit (= 0) will make the corresponding
PORTB pin an output (i.e., enable the output driver and
put the contents of the output latch on the selected pin).
Example 12-2
Reading the PORTB register
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then written
to the PORT data latch (LATB).
The TRISB register
pin output drivers, even when they are being used as
analog inputs. The user should ensure the bits in the
TRISB register are maintained set when using them as
analog inputs. I/O pins configured as analog input always
read ‘0’.
The INLVLB register
voltage threshold for each of the available PORTB
input pins. A selection between the Schmitt Trigger
CMOS or the TTL Compatible thresholds is available.
The input threshold is important in determining the
value of a read of the PORTB register and also the level
at which an Interrupt-on-Change occurs, if that feature
is enabled. See
PIC16F/LF1824/1828-I/E”
threshold levels.
12.3.1
Each of the PORTB pins has an individually configurable
internal weak pull-up. Control bits WPUB<7:4> enable or
disable each pull-up (see
pull-up is automatically turned off when the port pin is
configured as an output. All pull-ups are disabled on a
Power-on Reset by the WPUEN bit of the OPTION
register.
DS41419B-page 130
Note:
PORTB Registers
(PIC16F/LF1828 only)
12-10). Setting a TRISB bit (= 1) will make the
Changing the input threshold selection
should be performed while all peripheral
modules are disabled. Changing the
threshold level during the time a module is
active may inadvertently generate a tran-
sition associated with an input pin, regard-
less of the actual voltage level on that pin.
WEAK PULL-UPS
shows how to initialize PORTB.
data
Section 30.4 “DC Characteristics:
(Register
(Register
direction
Register
for more information on
12-10) controls the PORTB
(Register
12-14) controls the input
register
12-13). Each weak
12-9) reads the
is
TRISB
Preliminary
12.3.2
The ANSELB register
configure the Input mode of an I/O pin to analog.
Setting the appropriate ANSELB bit high will cause all
digital reads on the pin to be read as ‘0’ and allow
analog functions on the pin to operate correctly.
The state of the ANSELB bits has no affect on digital out-
put functions. A pin with TRIS clear and ANSELB set will
still operate as a digital output, but the Input mode will be
analog. This can cause unexpected behavior when exe-
cuting read-modify-write instructions on the affected
port.
EXAMPLE 12-2:
BANKSEL PORTB
CLRF
BANKSEL LATB
CLRF
BANKSEL ANSELB
CLRF
BANKSEL TRISB
MOVLW
MOVWF
Note:
PORTB
LATB
ANSELB
B’11110000’ ;Set RB<7:4> as inputs
TRISB
ANSELB REGISTER
The ANSELB register must be initialized
to configure an analog channel as a digital
input. Pins configured as analog inputs
will read ‘0’.
INITIALIZING PORTB
 2010 Microchip Technology Inc.
;
;Init PORTB
;Data Latch
;
;Make RB<7:4> digital
;
;
(Register
12-12) is used to

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