MT49H16M18CBM-25 Micron Technology Inc, MT49H16M18CBM-25 Datasheet - Page 52

• Manufacturer Part Number: MT49H16M18CBM-25
• Manufacturer: Micron Technology Inc
• Type: RLDRAMr

Specifications of MT49H16M18CBM-25

• Organization: 16Mx18
• Density: 288Mb
• Address Bus: 23b
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: uBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 779mA
• Pin Count: 144
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Figure 33:
PDF: 09005aef815b2df8/Source: 09005aef811ba111
288Mb_RLDRAM_II_SIO_Core2.fm - Rev. O 1/11 EN
COMMAND
ADDRESS
ADDRESS
BANK
V
V
V
DK#
DD
REF
CK#
V
DM
V
DK
R
CK
EXT
Q
DD
D
TT
Q
TT
High-Z
High-Z
High-Z
NOP
T0
Power-Up/Initialization Sequence in Multiplexed Address Mode
t CKH
t DKH
Power-up:
V
clock (CK, CK#)
DD
t CK
t DK
and stable
Notes:
t CKL
t DKL
NOP
T1
T = 200µs (MIN)
1. Recommended that all address pins be held LOW during dummy MRS commands.
2. A10–A18 must be LOW.
3. Set address A5 HIGH. This allows the part to enter multiplexed address mode when in the
4. Address A5 must be set HIGH. This and the following step set the desired mode register
5. Any command or address.
6. The above sequence must be followed in order to power up the RLDRAM in the multiplexed
7. DLL must be reset if
8. CK and CK# must separated at all times to prevent bogus commands from being issued.
9. The sequence of the eight AUTO REFRESH commands (with respect to the 1,024 NOP com-
nonmultiplexed mode of operation. Multiplexed address mode can also be entered into at
some later time by issuing an MRS command with A5 HIGH. Once address bit A5 is set HIGH,
t
once the RLDRAM is in multiplexed address mode.
address mode.
mands) does not matter. As is required for any operation,
AUTO REFRESH command and a subsequent VALID command to the same bank .
NOP
T2
MRSC must be satisfied before the two-cycle multiplexed mode MRS command is issued.
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NOP
T3
288Mb: x18 2.5V V
CODE
MRS
T4
1,2
t
CK or V
CODE
MRS
T5
DD
55
1,2
are changed.
CODE
MRS
T6
2,3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t MRSC
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Ax
T7
MRS
, 1.8V V
2,4
NOP
Ay
T8
DD
t
RC must be met between an
t MRSC
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, HSTL, SIO, RLDRAM II
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Bank 0
©2003Micron Technology, Inc. All rights reserved.
T9
REF
all banks 9
Refresh
Indicates a break in
time scale
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Bank 7
REF
T10
Operations
commands
1,024 NOP
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VALID
VALID
VALID
T11
DON’T CARE
5
5
5