LSISAS1064 LSI, LSISAS1064 Datasheet - Page 101

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

Table 4.8
31
PCI Memory [1] Address Map
Table 4.6
Table 4.7
Table 4.7
Table 4.8
A bit level description of the PCI Memory and PCI I/O Spaces follows.
PCI I/O Space and Memory Space Register Description
Copyright © 2003–2005 by LSI Logic Corporation. All rights reserved.
31
31
High Priority Request MFA Queue
High Priority Request MFA Queue
Diagnostic Memory
Diagnostic Read/Write Address
defines the PCI Memory Space [0] address map.
defines the PCI Memory Space [1] address map.
Diagnostic Read/Write Data
Host Interrupt Status
16 15
Host Interrupt Mask
Test Base Address
PCI I/O Space Address Map
PCI Memory [0] Address Map
Host Interrupt Status
Host Interrupt Mask
System Doorbell
Write Sequence
Shared Memory
Host Diagnostic
Request Queue
Test Base Address
System Doorbell
Reply Queue
Write Sequence
Host Diagnostic
Request Queue
Reply Queue
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
16 15
16 15
0
0
0x(Sizeof(Mem0) 1)
0x004C–0x007F
0x0010–0x002F
0x0038–0x003F
0x004C–0x007F
0x0018–0x002F
0x0038–0x003F
0x0080–
0x000C
0x0000
0x0004
0x0008
0x0030
0x0034
0x0040
0x0044
0x0048
Offset
0x000C
0x0000
0x0004
0x0008
0x0010
0x0014
0x0030
0x0034
0x0040
0x0044
0x0048
Offset
0
0x(Sizeof(Mem1) 1)
0x0000–
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