LSISAS1064 LSI, LSISAS1064 Datasheet - Page 45

• Manufacturer Part Number: LSISAS1064
• Manufacturer: LSI

Specifications of LSISAS1064

• Lead Free Status / RoHS Status: Not Compliant

2.5
2.5.1
External Memory Interface
Memory Requirements
Figure 2.4
The external memory control block provides a direct slave interface
between the internal primary AHB bus and an external 32-bit memory
interface. This interface is for accessing external Flash ROM and
NVSRAM devices. Because the LSISAS1064 uses a 32-bit multiplexed
address/data bus, designs using the LSISAS1064 do not require latches
or CPLD devices to construct memory addresses.
The memory requirements for the LSISAS1064 depend on the board
design and application. Several board design possibilities and their
respective memory requirements are presented as follows.
External Memory Interface
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Initiator
Target
SAS
SAS
System board implementation
–
–
Host Bus Adapter (HBA) implementation
–
Intelligent IOP implementation
SSP
If the system uses the firmware download boot procedure,
external memory may be required depending on the system
implementation.
If the system does not use the firmware download boot
procedure, then the LSISAS1064 requires only a Flash ROM.
The LSISAS1064 requires only a Flash ROM.
SSP, STP, and SMP Protocol Usage
Initiator
Target
SMP
SMP
SMP
Initiator
Target
SATA
SAS
SATA
Expander
Initiator
Target
SATA
SAS
SAS
STP
SATA
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