S9S08SG16E1CTJ Freescale, S9S08SG16E1CTJ Datasheet - Page 142

• Manufacturer Part Number: S9S08SG16E1CTJ
• Manufacturer: Freescale

Specifications of S9S08SG16E1CTJ

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 16
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 16KB
• Lead Free Status / RoHS Status: Compliant

Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
9.4.5
The compare function is enabled by the ACFE bit. The compare function can be configured to check for
an upper or lower limit. After the input is sampled and converted, the compare value (ADCCVH and
ADCCVL) is subtracted from the conversion result. When comparing to an upper limit (ACFGT = 1), if
the conversion result is greater-than or equal-to the compare value, COCO is set. When comparing to a
lower limit (ACFGT = 0), if the result is less than the compare value, COCO is set. An ADC interrupt is
generated upon the setting of COCO if the ADC interrupt is enabled (AIEN = 1).
The subtract operation of two positive values (the conversion result less the compare value) results in a
signed value that is 1-bit wider than the bit-width of the two terms. The final value transferred to the
ADCRH and ADCRL registers is the result of the subtraction operation, excluding the sign bit. The value
of the sign bit can be derived based on ACFGT control setting. When ACFGT=1, the sign bit of any value
stored in ADCRH and ADCRL is always 0, indicating a positive result for the subtract operation. When
ACFGT = 1, the sign bit of any result is always 1, indicating a negative result for the subtract operation.
Upon completion of a conversion while the compare function is enabled, if the compare condition is not
true, COCO is not set and no data is transferred to the result registers.
An example of compare operation eases understanding of the compare feature. If the ADC is configured
for 10-bit operation, ACFGT=0, and ADCCVH:ADCCVL= 0x200, then a conversion result of 0x080
causes the compare condition to be met and the COCO bit is set. A value of 0x280 is stored in
ADCRH:ADCRL. This is signed data without the sign bit and must be combined with a derived sign bit
to have meaning. The value stored in ADCRH:ADCRL is calculated as follows.
The value to interpret from the data is (Result – Compare Value) = (0x080 – 0x200) = –0x180. A standard
method for handling subtraction is to convert the second term to its 2’s complement, and then add the two
terms. First calculate the 2’s complement of 0x200 by complementing each bit and adding 1. Note that
prior to complementing, a sign bit of 0 is added so that the 10-bit compare value becomes a 11-bit signed
value that is always positive.
Then the conversion result of 0x080 is added to 2’s complement of 0x200:
142
Automatic Compare Function
+
The compare function can monitor the voltage on a channel while the MCU
is in wait or stop3 mode. The ADC interrupt wakes the MCU when the
compare condition is met.
+
%101 1111 1111
---------------
%110 0000 0000
%000 1000 0000
%110 0000 0000
---------------
%110 1000 0000
%1
MC9S08SG32 Data Sheet, Rev. 8
<= 1’s complement of 0x200 compare value
<= 2’s complement of 0x200 compare value
<= Subtraction result is –0x180 in signed 11-bit data
NOTE
Freescale Semiconductor