S9S08SG16E1CTJ Freescale, S9S08SG16E1CTJ Datasheet - Page 51
S9S08SG16E1CTJ
Manufacturer Part Number
S9S08SG16E1CTJ
Description
Manufacturer
Freescale
Datasheet
1.S9S08SG16E1CTJ.pdf
(330 pages)
Specifications of S9S08SG16E1CTJ
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
SCI/SPI
Total Internal Ram Size
1KB
# I/os (max)
16
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
16KB
Lead Free Status / RoHS Status
Compliant
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4.5.4
The burst program command is used to program sequential bytes of data in less time than would be
required using the standard program command. This is possible because the high voltage to the FLASH
array does not need to be disabled between program operations. Ordinarily, when a program or erase
command is issued, an internal charge pump associated with the FLASH memory must be enabled to
supply high voltage to the array. Upon completion of the command, the charge pump is turned off. When
a burst program command is issued, the charge pump is enabled and then remains enabled after completion
of the burst program operation if these two conditions are met:
Freescale Semiconductor
•
•
The next burst program command has been queued before the current program operation has
completed.
The next sequential address selects a byte on the same physical row as the current byte being
programmed. A row of FLASH memory consists of 64 bytes. A byte within a row is selected by
addresses A5 through A0. A new row begins when addresses A5 through A0 are all zero.
Burst Program Execution
FLASH PROGRAM AND
ERASE FLOW
Figure 4-2. FLASH Program and Erase Flowchart
0
TO BUFFER ADDRESS AND DATA
MC9S08SG32 Data Sheet, Rev. 8
WRITE COMMAND TO FCMD
AND CLEAR FCBEF (Note 2)
WRITE TO FCDIV (Note 1)
TO LAUNCH COMMAND
WRITE 1 TO FCBEF
WRITE TO FLASH
CLEAR ERROR
FACCERR ?
FPVIOL OR
FACCERR ?
FCCF ?
START
DONE
1
NO
1
YES
0
Note 2: Wait at least four bus cycles
Note 1: Required only once after reset.
ERROR EXIT
before checking FCBEF or FCCF.
Chapter 4 Memory
51
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