S9S08SG16E1CTJ Freescale, S9S08SG16E1CTJ Datasheet - Page 57

• Manufacturer Part Number: S9S08SG16E1CTJ
• Manufacturer: Freescale

Specifications of S9S08SG16E1CTJ

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 16
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 16KB
• Lead Free Status / RoHS Status: Compliant

4.7.2
During reset, the contents of the nonvolatile location NVOPT are copied from FLASH into FOPT. To
change the value in this register, erase and reprogram the NVOPT location in FLASH memory as usual
and then issue a new MCU reset.
Freescale Semiconductor
SEC0[1:0]
FNORED
Reset
KEYEN
Field
1:0
7
6
W
R
KEYEN
FLASH Options Register (FOPT and NVOPT)
Backdoor Key Mechanism Enable — When this bit is 0, the backdoor key mechanism cannot be used to
disengage security. The backdoor key mechanism is accessible only from user (secured) firmware. BDM
commands cannot be used to write key comparison values that would unlock the backdoor key. For more detailed
information about the backdoor key mechanism, refer to
0 No backdoor key access allowed.
1 If user firmware writes an 8-byte value that matches the nonvolatile backdoor key (NVBACKKEY through
Vector Redirection Disable — When this bit is 1, then vector redirection is disabled.
0 Vector redirection enabled.
1 Vector redirection disabled.
Security State Code — This 2-bit field determines the security state of the MCU as shown in
the MCU is secure, the contents of RAM and FLASH memory cannot be accessed by instructions from any
unsecured source including the background debug interface. SEC01:SEC00 changes to 1:0 after successful
backdoor key entry or a successful blank check of FLASH.
For more detailed information about security, refer to
7
200 kHz
150 kHz
NVBACKKEY+7 in that order), security is temporarily disengaged until the next MCU reset.
20 MHz
10 MHz
8 MHz
4 MHz
2 MHz
1 MHz
f
Bus
= Unimplemented or Reserved
FNORED
(Binary)
PRDIV8
6
1
0
0
0
0
0
0
0
This register is loaded from nonvolatile location NVOPT during reset.
Table 4-8. FOPT Register Field Descriptions
Figure 4-6. FLASH Options Register (FOPT)
Table 4-7. FLASH Clock Divider Settings
(Decimal)
0
5
MC9S08SG32 Data Sheet, Rev. 8
DIV
12
49
39
19
9
4
0
0
0
4
192.3 kHz
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
150 kHz
f
FCLK
Description
Section 4.6,
Section 4.6,
3
0
Program/Erase Timing Pulse
(5 μs Min, 6.7 μs Max)
“Security.”
“Security.”
5.2 μs
6.7 μs
5 μs
5 μs
5 μs
5 μs
5 μs
5 μs
0
2
SEC01
1
Table
Chapter 4 Memory
4-9. When
SEC00
0
57