S9S08SG16E1CTJ Freescale, S9S08SG16E1CTJ Datasheet - Page 144

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S9S08SG16E1CTJ

Manufacturer Part Number
S9S08SG16E1CTJ
Description
Manufacturer
Freescale
Datasheet

Specifications of S9S08SG16E1CTJ

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
SCI/SPI
Total Internal Ram Size
1KB
# I/os (max)
16
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
16KB
Lead Free Status / RoHS Status
Compliant
Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
9.4.7.2
If ADACK is selected as the conversion clock, the ADC continues operation during stop3 mode. For
guaranteed ADC operation, the MCU’s voltage regulator must remain active during stop3 mode. Consult
the module introduction for configuration information for this MCU.
If a conversion is in progress when the MCU enters stop3 mode, it continues until completion. Conversions
can be initiated while the MCU is in stop3 mode by means of the hardware trigger or if continuous
conversions are enabled.
A conversion complete event sets the COCO and generates an ADC interrupt to wake the MCU from stop3
mode if the ADC interrupt is enabled (AIEN = 1).
9.4.8
The ADC module is automatically disabled when the MCU enters either stop2 mode. All module registers
contain their reset values following exit from stop2. Therefore, the module must be re-enabled and
re-configured following exit from stop2.
9.5
This section gives an example that provides some basic direction on how to initialize and configure the
ADC module. You can configure the module for 8-bit or 10-bit resolution, single or continuous conversion,
and a polled or interrupt approach, among many other options. Refer to
for information used in this example.
9.5.1
9.5.1.1
Before the ADC module can be used to complete conversions, an initialization procedure must be
performed. A typical sequence is as follows:
144
1. Update the configuration register (ADCCFG) to select the input clock source and the divide ratio
used to generate the internal clock, ADCK. This register is also used for selecting sample time and
low-power configuration.
Initialization Information
MCU Stop2 Mode Operation
ADC Module Initialization Example
Stop3 Mode With ADACK Enabled
Initialization Sequence
The ADC module can wake the system from low-power stop and cause the
MCU to begin consuming run-level currents without generating a system
level interrupt. To prevent this scenario, software should ensure the data
transfer blocking mechanism (discussed in
Conversions) is cleared when entering stop3 and continuing ADC
conversions.
Hexadecimal values designated by a preceding 0x, binary values designated
by a preceding %, and decimal values have no preceding character.
MC9S08SG32 Data Sheet, Rev. 8
NOTE
NOTE
Section 9.4.4.2, “Completing
Table
9-7,
Table
Freescale Semiconductor
9-8, and
Table 9-9

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