S9S08SG16E1CTJ Freescale, S9S08SG16E1CTJ Datasheet - Page 87

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S9S08SG16E1CTJ

Manufacturer Part Number
S9S08SG16E1CTJ
Description
Manufacturer
Freescale
Datasheet

Specifications of S9S08SG16E1CTJ

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
SCI/SPI
Total Internal Ram Size
1KB
# I/os (max)
16
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
16KB
Lead Free Status / RoHS Status
Compliant
6.6.2
Port B is controlled by the registers listed below.
6.6.2.1
6.6.2.2
Freescale Semiconductor
PTBDD[7:0]
PTBD[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
W
W
R
R
PTBDD7
PTBD7
Port B Registers
Port B Data Register Bits — For port B pins that are inputs, reads return the logic level on the pin. For port B
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port B pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTBD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups/pull-downs disabled.
Data Direction for Port B Bits — These read/write bits control the direction of port B pins and what is read for
PTBD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port B bit n and PTBD reads return the contents of PTBDn.
Port B Data Register (PTBD)
0
Port B Data Direction Register (PTBDD)
0
7
7
PTBDD6
PTBD6
0
0
6
6
Figure 6-12. Port B Data Direction Register (PTBDD)
Table 6-11. PTBDD Register Field Descriptions
Table 6-10. PTBD Register Field Descriptions
Figure 6-11. Port B Data Register (PTBD)
PTBDD5
PTBD5
0
0
5
5
MC9S08SG32 Data Sheet, Rev. 8
PTBDD4
PTBD4
0
0
4
4
Description
Description
PTBDD3
PTBD3
3
0
3
0
PTBDD2
PTBD2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTBDD1
PTBD1
0
0
1
1
PTBDD0
PTBD0
0
0
0
0
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