AD9515BCPZ Analog Devices Inc, AD9515BCPZ Datasheet - Page 2

• Manufacturer Part Number: AD9515BCPZ
• Description: IC CLOCK DIST 2OUT PLL 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Fanout Buffer (Distribution), Dividerr

Specifications of AD9515BCPZ

• Design Resources: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/Yes
• Input: Differential
• Output: CMOS, LVDS, LVPECL
• Frequency - Max: 1.6GHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Frequency-max: 1.6GHz
• No. Of Multipliers / Dividers: 2
• No. Of Amplifiers: 3
• Supply Voltage Range: 3.135V To 3.465V
• Slew Rate: 1V/ns
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9515/PCBZ - BOARD EVAL CLOCK 2CH AD9515
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9515
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Diagrams............................................................................ 11
Absolute Maximum Ratings.......................................................... 12
Pin Configuration and Function Descriptions........................... 13
Terminology .................................................................................... 14
Typical Performance Characteristics ........................................... 15
Functional Description .................................................................. 18
REVISION HISTORY
7/05—Revision 0: Initial Version
Clock Input.................................................................................... 3
Clock Outputs ............................................................................... 3
Timing Characteristics ................................................................ 4
Clock Output Phase Noise .......................................................... 5
Clock Output Additive Time Jitter............................................. 8
SYNCB, VREF, and Setup Pins ................................................... 9
Power............................................................................................ 10
Thermal Characteristics ............................................................ 12
ESD Caution................................................................................ 12
Overall.......................................................................................... 18
CLK, CLKB—Differential Clock Input ................................... 18
Rev. 0 | Page 2 of 28
Programming .................................................................................. 20
Applications..................................................................................... 25
Outline Dimensions ....................................................................... 28
Synchronization.......................................................................... 18
R
VREF............................................................................................ 19
Setup Configuration................................................................... 19
Divider Phase Offset .................................................................. 22
Delay Block ................................................................................. 22
Outputs ........................................................................................ 23
Power Supply............................................................................... 23
Power Management ................................................................... 24
Using the AD9515 Outputs for ADC Clock Applications.... 25
LVPECL Clock Distribution ..................................................... 25
LVDS Clock Distribution .......................................................... 26
CMOS Clock Distribution ........................................................ 26
Setup Pins (S0 to S10)................................................................ 26
Power and Grounding Considerations and Power Supply
Rejection...................................................................................... 26
Phase Noise and Jitter Measurement Setups........................... 27
Ordering Guide .......................................................................... 28
SET
Resistor ................................................................................ 19