AD9515BCPZ Analog Devices Inc, AD9515BCPZ Datasheet - Page 24

• Manufacturer Part Number: AD9515BCPZ
• Description: IC CLOCK DIST 2OUT PLL 32LFCSP
• Manufacturer: Analog Devices Inc
• Type: Fanout Buffer (Distribution), Dividerr

Specifications of AD9515BCPZ

• Design Resources: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/Yes
• Input: Differential
• Output: CMOS, LVDS, LVPECL
• Frequency - Max: 1.6GHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Frequency-max: 1.6GHz
• No. Of Multipliers / Dividers: 2
• No. Of Amplifiers: 3
• Supply Voltage Range: 3.135V To 3.465V
• Slew Rate: 1V/ns
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9515/PCBZ - BOARD EVAL CLOCK 2CH AD9515
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9515
Exposed Metal Paddle
The exposed metal paddle on the AD9515 package is an
electrical connection, as well as a thermal enhancement. For
the device to function properly, the paddle must be properly
attached to ground (GND).
The exposed paddle of the AD9515 package must be soldered
down. The AD9515 must dissipate heat through its exposed
paddle. The PCB acts as a heat sink for the AD9515. The PCB
attachment must provide a good thermal path to a larger heat
dissipation area, such as a ground plane on the PCB. This
requires a grid of vias from the top layer down to the ground
plane (see Figure 34). The AD9515 evaluation board
(AD9515/PCB)provides a good example of how the part
should be attached to the PCB.
Figure 34. PCB Land for Attaching Exposed Paddle
VIAS TO GND PLANE
Rev. 0 | Page 24 of 28
POWER MANAGEMENT
In some cases, the AD9515 can be configured to use less power
by turning off functions that are not being used.
The power-saving options include the following:
•
•
•
A divider is powered down when set to divide = 1
(bypassed).
Adjustable delay block on OUT1 is powered down when in
off mode (S0 = 0).
An unneeded output can be powered down (see Table 12
and Table 13). This also powers down the divider for that
output.