AD9515BCPZ Analog Devices Inc, AD9515BCPZ Datasheet - Page 8

IC CLOCK DIST 2OUT PLL 32LFCSP

AD9515BCPZ

Manufacturer Part Number
AD9515BCPZ
Description
IC CLOCK DIST 2OUT PLL 32LFCSP
Manufacturer
Analog Devices Inc
Type
Fanout Buffer (Distribution), Dividerr
Datasheet

Specifications of AD9515BCPZ

Design Resources
Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109)
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/Yes
Input
Differential
Output
CMOS, LVDS, LVPECL
Frequency - Max
1.6GHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LFCSP
Frequency-max
1.6GHz
No. Of Multipliers / Dividers
2
No. Of Amplifiers
3
Supply Voltage Range
3.135V To 3.465V
Slew Rate
1V/ns
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9515/PCBZ - BOARD EVAL CLOCK 2CH AD9515
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
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Manufacturer:
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Manufacturer:
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Quantity:
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Company:
Part Number:
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AD9515
Parameter
CLOCK OUTPUT ADDITIVE TIME JITTER
Table 5.
Parameter
LVPECL OUTPUT ADDITIVE TIME JITTER
LVDS OUTPUT ADDITIVE TIME JITTER
CLK = 78.6432 MHz, OUT = 78.6432 MHz
CLK = 78.6432 MHz, OUT = 39.3216 MHz
CLK = 622.08 MHz
CLK = 622.08 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
CLK = 400 MHz
Divide = 1
Divide = 2
LVPECL (OUT0) = 622.08 MHz
Divide = 1
LVPECL (OUT0) = 155.52 MHz
Divide = 4
LVPECL (OUT0) = 100 MHz
Divide = 4
LVPECL (OUT0) = 100 MHz
Divide = 4
LVDS (OUT1) = 100 MHz
LVPECL (OUT0) = 100 MHz
Divide = 4
LVDS (OUT1) = 50 MHz
LVPECL (OUT0) = 100 MHz
Divide = 4
CMOS (OUT1) = 50 MHz
LVDS (OUT1) = 100 MHz
Divide = 4
LVDS (OUT1) = 100 MHz
Divide = 4
LVPECL (OUT0)= 50 MHz
@ 10 Hz Offset
@ 100 Hz Offset
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
@ 1 MHz Offset
>10 MHz Offset
@ 10 Hz Offset
@ 100 Hz Offset
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
>1 MHz Offset
Min
Typ
40
55
215
215
225
230
300
350
Min
Rev. 0 | Page 8 of 28
Max
Typ
−122
−132
−140
−150
−155
−158
−160
−128
−136
−146
−155
−161
−162
Unit
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
fs rms
Max
Test Conditions/Comments
BW = 12 kHz − 20 MHz (OC-12)
OUT1 off
BW = 12 kHz − 20 MHz (OC-3)
OUT1 off
Calculated from SNR of ADC method
OUT1 off
Calculated from SNR of ADC method
Interferer
Calculated from SNR of ADC method
Interferer
Calculated from SNR of ADC method
Interferer
Delay off
Calculated from SNR of ADC method
OUT0 off
Calculated from SNR of ADC method
OUT0 off
Interferer
Unit
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Test Conditions/Comments

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