S19252PBIDB Applied Micro Circuits Corporation, S19252PBIDB Datasheet - Page 4

• Manufacturer Part Number: S19252PBIDB
• Manufacturer: Applied Micro Circuits Corporation

Specifications of S19252PBIDB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

S19252 Data Sheet
RECEIVE OUTPUT PIN DESCRIPTION ............................................................................................................... 20
COMMON INPUT PIN DESCRIPTION .................................................................................................................. 21
COMMON OUTPUT PIN DESCRIPTION .............................................................................................................. 24
TRANSMITTER FUNCTIONAL DESCRIPTION ................................................................................................... 24
4
SERDATIP/N Internal Termination (CENTER_TAP) – External Pin ............................................................... 15
Receive Loop Filter (RXCAP1, RXCAP2) – External Pin ................................................................................ 15
Receiver Reset (RX_RSTB) – Register ........................................................................................................... 15
Lock-to-Reference (LCKREFN) – Register ..................................................................................................... 16
LOS/Signal Detect (LOS_SD) – External Pin .................................................................................................. 16
Signal Detect Polarity (SD_POL) – Register ................................................................................................... 16
RX Ref. Select (RXREFA_NOTB) – Register .................................................................................................. 16
Receive Reference Rate Select (RXREFSEL) – Register ............................................................................... 16
CRU Reference Clock (REFCLKAP/N) – External Pin .................................................................................... 17
Kill Parallel Output Clock (KILLPOCLK) – Register ......................................................................................... 18
Kill Parallel Output Data (KILLPOUTB) – Register .......................................................................................... 18
Kill Parallel Output MCK Clock (KILLRXMCK) – Register ............................................................................... 18
Receive Built-In Self Test Enable (RX_BIST_EN) – Register ......................................................................... 18
Receive Built-In Self Test Clear (RX_BIST_CLR) – Register .......................................................................... 18
LOS Threshold Assert (LOS_VTH_AST [7:0]) – Register ............................................................................... 18
LOS Threshold De-Assert (LOS_VTH_DST [7:0]) – Register ......................................................................... 18
Phase Adjust (PHASE_ADJ[2:0]) – Register ................................................................................................... 18
Post Amplifier Offset Adjust (PAOFFADJ[9:0]) and Adaptive Post Amplifier Offset Adjust Enable (ADAPOFF-
Parallel Output Data Bus Swap (RX_DATA_SWAP) – Register ..................................................................... 20
Parallel Output Clock (POCLKP/N) – External Pin .......................................................................................... 20
Parallel Output Data (POUTP/N[15:0]) – 
Receive Lock Detect (RX_LOCKDET) – Register and External Pin ............................................................... 20
Recovered 622.08/155.52 MHz Clock (RX_MCKP/N) – External Pin ............................................................. 20
Receive Built-In Self Test Error (RX_BIST_ERR) – Register .......................................................................... 20
Reset (RSTB) – External Pin ........................................................................................................................... 21
Diagnostic Loopback Enable (DLEB) – Register ............................................................................................. 21
Line Loopback Enable (LLEB) – Register ....................................................................................................... 21
Reference Loop Timing (RLPTIME) – Register ............................................................................................... 21
User Defined BIST Pattern (BIST_PTRN[15:0]) – Register ............................................................................ 23
Pattern Select (PRBS_SELECT[1:0]) – Register ............................................................................................ 23
Bit Error Rate Range Select (BER_SELECT[2:0]) – Register ......................................................................... 23
Bit Error Rate Reset (BER_RSTB) – Register ................................................................................................. 23
Clock Stop Value (CLKSTOP_VAL) – Register ............................................................................................... 23
Transmit and Receive Alarm (TX_RX_ALARM) – Register and External Pin ................................................. 24
Built In Self Test Active (BIST_ACTIVE) – Register ........................................................................................ 24
Bit Error Rate Count (BER_COUNT[11:0]) – Register .................................................................................... 24
Bit Error Rate Overflow (BER_OVERFLOW) – Register ................................................................................. 24
Terminal Count Monitor (TERM_COUNT) – Register ..................................................................................... 24
MUX Operation ................................................................................................................................................ 24
ADJ) – Registers ....................................................................................................................................... 19
External Pin ............................................................................................................................................... 20
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Revision 5.03