S19252PBIDB Applied Micro Circuits Corporation, S19252PBIDB Datasheet - Page 50

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S19252PBIDB

Manufacturer Part Number
S19252PBIDB
Description
Manufacturer
Applied Micro Circuits Corporation
Datasheet

Specifications of S19252PBIDB

Lead Free Status / Rohs Status
Supplier Unconfirmed
S19252 Data Sheet
Table 22: Input Pin Assignments and Descriptions (Continued)
50
RLPTIME
CLKSTOP_VAL
BIST_PTRN[15:0]
PRBS_SELECT[1:0]
BER_SELECT[2:0]
BER_RSTB
Pin Name
Register
Register
Register
0x87-88h
Register
Register
Register
0x03h
0x05h
0x89h
0x83h
0x86h
Level
AppliedMicro - Confidential and Proprietary
I/O
I
I
I
I
I
I
Pin#
Reference Loop Timing. This active high input selects Reference
Loop Timing Mode. In this mode, the transmitter CSU utilizes the
receiver POCLK instead of the CSU_REFCLK. See Table 12 for
details. This signal can be accessed through the serial bus register
(Default = 0).
Clock Stop Value. When a clock is killed, this register bit specifies
the steady state value of the killed clock. A low value programs the
killed clock to a low steady state value. A high value programs the
killed clock to high steady state value. This signal is only accessible
by serial bus control. (Default = 0).
User Defined BIST Pattern (BIST_PTRN[15:0]). This user defined
pattern is output from the transmit or the receive pattern generator.
This pattern is loaded on the rising edge of TX_BIST_EN or
RX_BIST_EN. The user defined pattern can be selected by proper
setting of the PRBS_SEL[1:0]. This input can be accessed through
the serial bus register.
Pattern Select (PRBS_SELECT[1:0]). The pattern select bits select
between the different PRBS patterns and the user defined pattern.
See Table 13 for details. This input can be accessed through the
serial bus register (Default = 0,0).
Bit Error Rate Range Select (BER_SELECT[2:0]). The bit error rate
range select bits selects the appropriate bit error rate range for report-
ing the but error rate. See Table 14 for details. This input can be
accessed through the serial bus register (Default =1,0,0).
Bit Error Rate Reset (BER_RSTB). This input selects whether the
BER_COUNT[11:0] is reset after each terminal count. Active high.
When active, BER_COUNT[11:0] is not reset after each terminal
count, but instead continues to accrue errors. This input can be
accessed through the serial bus register (Default = 0).
Description
Revision 5.03

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